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Class Information
Number: 703/19
Name: Data processing: structural design, modeling, simulation, and emulation > Simulating electronic device or electrical system > Timing
Description: Subject matter wherein the timing delay of the electrical device or the electrical system is being simulated.










Patents under this class:
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Patent Number Title Of Patent Date Issued
7177789 Method and apparatus for testing the operation of an electronic unit by simulation Feb. 13, 2007
7167821 Evaluating hardware models having resource contention Jan. 23, 2007
7162389 Evaluation device for control unit, simulator, and evaluation system Jan. 9, 2007
7162411 Dynamic data trace output scheme Jan. 9, 2007
7159160 Method and apparatus for measuring switching noise in integrated circuits Jan. 2, 2007
7155691 Apparatus and methods for compiled static timing analysis Dec. 26, 2006
7149676 Variable accuracy modes in microprocessor simulation Dec. 12, 2006
7139691 Method for calculating weighted average ground bounce noise generated by simultaneous switching outputs in a digital system Nov. 21, 2006
7133817 State coverage tool Nov. 7, 2006
7133819 Method for adaptive critical path delay estimation during timing-driven placement for hierarchical programmable logic devices Nov. 7, 2006
7133821 Read FIFO scheduling for multiple streams while maintaining coherency Nov. 7, 2006
7131093 Methods and apparatus for creating a programmable link delay Oct. 31, 2006
7131088 Reliability based characterization using bisection Oct. 31, 2006
7130915 Fast transaction response time prediction across multiple delay sources Oct. 31, 2006
7127385 Delay time estimation method and recording medium storing estimation program Oct. 24, 2006
7100132 Source synchronous timing extraction, cyclization and sampling Aug. 29, 2006
7096443 Method for determining the critical path of an integrated circuit Aug. 22, 2006
7085704 Time-indexed multiplexing as an efficient method of scheduling in hardware Aug. 1, 2006
7079997 IC behavior analysis system Jul. 18, 2006
7080345 Methods and apparatus for design entry and synthesis of digital circuits Jul. 18, 2006
7076419 Using sign extension to compress on-chip data processor trace and timing information for export Jul. 11, 2006
7072821 Device and method for synchronizing an asynchronous signal in synthesis and simulation of a clocked circuit Jul. 4, 2006
7072820 Accessing state information in a hardware/software co-simulation Jul. 4, 2006
7062423 Method and apparatus for testing a system on a chip (SOC) integrated circuit comprising a hard disk controller and read channel Jun. 13, 2006
7051298 Method and apparatus for specifying a distance between an external state and a set of states in space May. 23, 2006
7047175 System and method for enhancing the speed of dynamic timing simulation using delay assessment at compile time May. 16, 2006
7039576 System verification equipment, system verification method and LSI manufacturing method using the system verification equipment May. 2, 2006
7038466 Measurement of circuit delay May. 2, 2006
7016826 Apparatus and method of developing software for a multi-processor chip Mar. 21, 2006
7013253 Method and apparatus for calculation of crosstalk noise in integrated circuits Mar. 14, 2006
7007256 Method and apparatus for power consumption analysis in global nets Feb. 28, 2006
7006961 Marker argumentation for an integrated circuit design tool and file structure Feb. 28, 2006
7000163 Optimized buffering for JTAG boundary scan nets Feb. 14, 2006
6996515 Enabling verification of a minimal level sensitive timing abstraction model Feb. 7, 2006
6996514 Time simulation techniques to determine network availability Feb. 7, 2006
6993734 Use of time step information in a design verification system Jan. 31, 2006
6993469 Method and apparatus for unified simulation Jan. 31, 2006
6985848 Obtaining and exporting on-chip data processor trace and timing information Jan. 10, 2006
6985843 Cell modeling in the design of an integrated circuit Jan. 10, 2006
6983235 Method and apparatus for implementing constant latency Z-domain transfer functions using processor elements of variable latency Jan. 3, 2006
6983234 System and method for validating processor performance and functionality Jan. 3, 2006
6975979 Method and computer software product for calculating and presenting a numerical value representative of a property of a circuit Dec. 13, 2005
6973422 Method and apparatus for modeling and circuits with asynchronous behavior Dec. 6, 2005
6970815 Method of discriminating between different types of scan failures, computer readable code to cause a display to graphically depict one or more simulated scan output data sets versus time and a Nov. 29, 2005
6968306 Method and system for determining an interconnect delay utilizing an effective capacitance metric (ECM) signal delay model Nov. 22, 2005
6947868 Method for analysis of the time response of complex distributed systems Sep. 20, 2005
6938228 Simultaneously simulate multiple stimuli and verification using symbolic encoding Aug. 30, 2005
6937969 Method for determining signals in mixed signal systems Aug. 30, 2005
6933731 Method and system for determining transistor degradation mechanisms Aug. 23, 2005
6934670 Virtual test environment Aug. 23, 2005

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