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Class Information
Number: 438/938
Name: Semiconductor device manufacturing: process > Lattice strain control or utilization
Description: Art collection involving the regulation or utilization of lattice strain.
Patents under this class:
Patent Number |
Title Of Patent |
Date Issued |
8691644 |
Method of forming a CMOS device with a stressed-channel NMOS transistor and a strained-channel PMOS transistor |
Apr. 8, 2014 |
8647941 |
Method of forming semiconductor device |
Feb. 11, 2014 |
8642435 |
Performing treatment on stressors |
Feb. 4, 2014 |
8643061 |
Structure of high-K metal gate semiconductor transistor |
Feb. 4, 2014 |
8633078 |
Method for manufacturing semiconductor device |
Jan. 21, 2014 |
8617945 |
Stacking fault and twin blocking barrier for integrating III-V on Si |
Dec. 31, 2013 |
8603887 |
Method for depositing a silicon oxide layer of same thickness on silicon and on silicon-germanium |
Dec. 10, 2013 |
8545627 |
Zirconium and hafnium boride alloy templates on silicon for nitride integration applications |
Oct. 1, 2013 |
8524012 |
Technique for the growth of planar semi-polar gallium nitride |
Sep. 3, 2013 |
8486793 |
Method for manufacturing semiconductor device with semiconductor materials with different lattice constants |
Jul. 16, 2013 |
8466520 |
Transistor with an embedded strain-inducing material having a gradually shaped configuration |
Jun. 18, 2013 |
8394691 |
Semiconductor devices having stressor regions and related fabrication methods |
Mar. 12, 2013 |
8361893 |
Semiconductor device and substrate with chalcogen doped region |
Jan. 29, 2013 |
8343780 |
Method of stressing a thin pattern |
Jan. 1, 2013 |
8343872 |
Method of forming strained structures with compound profiles in semiconductor devices |
Jan. 1, 2013 |
8304276 |
Film stress management for MEMS through selective relaxation |
Nov. 6, 2012 |
8293609 |
Method of manufacturing a transistor device having asymmetric embedded strain elements |
Oct. 23, 2012 |
8274071 |
MOS devices with partial stressor channel |
Sep. 25, 2012 |
8232581 |
Method for manufacturing an III-V engineered substrate and the III-V engineered substrate thereof |
Jul. 31, 2012 |
8232171 |
Structure with isotropic silicon recess profile in nanoscale dimensions |
Jul. 31, 2012 |
8232191 |
Semiconductor device manufacturing method |
Jul. 31, 2012 |
8227791 |
Strain balanced light emitting devices |
Jul. 24, 2012 |
8207523 |
Metal oxide semiconductor field effect transistor with strained source/drain extension layer |
Jun. 26, 2012 |
8207040 |
Methods of manufacturing semiconductor devices including forming (111) facets in silicon capping layers on source/drain regions |
Jun. 26, 2012 |
8187957 |
Field-effect transistor and method for fabricating the same |
May. 29, 2012 |
8128756 |
Technique for the growth of planar semi-polar gallium nitride |
Mar. 6, 2012 |
8124473 |
Strain enhanced semiconductor devices and methods for their fabrication |
Feb. 28, 2012 |
8110478 |
Method for manufacturing semiconductor substrate, display panel, and display device |
Feb. 7, 2012 |
8063413 |
Tensile strained GE for electronic and optoelectronic applications |
Nov. 22, 2011 |
8049280 |
Semiconductor device and method of fabricating the same |
Nov. 1, 2011 |
7981750 |
Methods of fabrication of channel-stressed semiconductor devices |
Jul. 19, 2011 |
7968911 |
Relaxation of a strained layer using a molten layer |
Jun. 28, 2011 |
7923785 |
Field effect transistor having increased carrier mobility |
Apr. 12, 2011 |
7902008 |
Methods for fabricating a stressed MOS device |
Mar. 8, 2011 |
7892905 |
Formation of strained Si channel and Si.sub.1-xGe.sub.x source/drain structures using laser annealing |
Feb. 22, 2011 |
7867860 |
Strained channel transistor formation |
Jan. 11, 2011 |
7868317 |
MOS devices with partial stressor channel |
Jan. 11, 2011 |
7838354 |
Method for patterning contact etch stop layers by using a planarization process |
Nov. 23, 2010 |
7838934 |
Semiconductor device and method for manufacturing the same |
Nov. 23, 2010 |
7812374 |
Semiconductor device and fabrication method thereof |
Oct. 12, 2010 |
7791144 |
High performance stress-enhance MOSFET and method of manufacture |
Sep. 7, 2010 |
7768041 |
Multiple conduction state devices having differently stressed liners |
Aug. 3, 2010 |
7763515 |
Transistor with embedded silicon/germanium material on a strained semiconductor on insulator substrate |
Jul. 27, 2010 |
7732270 |
Device having enhanced stress state and related methods |
Jun. 8, 2010 |
7700416 |
Tensile strained semiconductor on insulator using elastic edge relaxation and a sacrificial stressor layer |
Apr. 20, 2010 |
7682952 |
Method for forming low defect density alloy graded layers and structure containing such layers |
Mar. 23, 2010 |
7615471 |
Method for producing a tensioned layer on a substrate, and a layer structure |
Nov. 10, 2009 |
7615418 |
High performance stress-enhance MOSFET and method of manufacture |
Nov. 10, 2009 |
7608489 |
High performance stress-enhance MOSFET and method of manufacture |
Oct. 27, 2009 |
7592213 |
Tensile strained NMOS transistor using group III-N source/drain regions |
Sep. 22, 2009 |
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