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Class Information
Number: 438/755
Name: Semiconductor device manufacturing: process > Chemical etching > Liquid phase etching > Electrically conductive material (e.g., metal, conductive oxide, etc.) > Silicide
Description: Processes wherein the material undergoing wet chemical etching is an electrically conductive compound of silicon and a metal atom.










Patents under this class:
1 2

Patent Number Title Of Patent Date Issued
6667233 Method for forming a silicide layer of semiconductor device Dec. 23, 2003
6624921 Micromirror device package fabrication method Sep. 23, 2003
6613673 Technique for elimination of pitting on silicon substrate during gate stack etch Sep. 2, 2003
6589884 Method of forming an inset in a tungsten silicide layer in a transistor gate stack Jul. 8, 2003
6558986 Method of crystallizing amorphous silicon thin film and method of fabricating polysilicon thin film transistor using the crystallization method May. 6, 2003
6521540 Method for making self-aligned contacts to source/drain without a hard mask layer Feb. 18, 2003
6498110 Ruthenium silicide wet etch Dec. 24, 2002
6486067 Method for improving the electrical isolation between the contact and gate in a self-aligned contact MOSFET device structure Nov. 26, 2002
6468914 Method of forming gate electrode in semiconductor device Oct. 22, 2002
6458711 Self-aligned silicide process Oct. 1, 2002
6387815 Method of manufacturing semiconductor substrate May. 14, 2002
6335294 Wet cleans for cobalt disilicide processing Jan. 1, 2002
6331478 Methods for manufacturing semiconductor devices having chamfered metal silicide layers Dec. 18, 2001
6284669 Power transistor with silicided gate and contacts Sep. 4, 2001
6221766 Method and apparatus for processing refractory metals on semiconductor substrates Apr. 24, 2001
6214713 Two step cap nitride deposition for forming gate electrodes Apr. 10, 2001
6200910 Selective titanium nitride strip Mar. 13, 2001
6083847 Method for manufacturing local interconnect Jul. 4, 2000
5990021 Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture Nov. 23, 1999
5989987 Method of forming a self-aligned contact in semiconductor fabrications Nov. 23, 1999
5937319 Method of making a metal oxide semiconductor (MOS) transistor polysilicon gate with a size beyond photolithography limitation by using polysilicidation and selective etching Aug. 10, 1999
5933757 Etch process selective to cobalt silicide for formation of integrated circuit structures Aug. 3, 1999
5915181 Method for forming a deep submicron MOSFET device using a silicidation process Jun. 22, 1999
5879974 Method of manufacturing a semiconductor device Mar. 9, 1999
5863344 Cleaning solutions for semiconductor devices Jan. 26, 1999
5776822 Method for fabricating semiconductor device having titanium silicide film Jul. 7, 1998
5756394 Self-aligned silicide strap connection of polysilicon layers May. 26, 1998
5716535 Methods and etchants for etching oxides of silicon with low selectivity Feb. 10, 1998
5385634 Sealed self aligned contact process Jan. 31, 1995
5075243 Fabrication of nanometer single crystal metallic CoSi.sub.2 structures on Si Dec. 24, 1991

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