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Class Information
Number: 438/737
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate > Substrate possessing multiple layers
Description: Processes wherein the semiconductor substrate undergoing etching possesses plural layers.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6465344 |
Crystal thinning method for improved yield and reliability |
Oct. 15, 2002 |
| 6461892 |
Methods of making a connection component using a removable layer |
Oct. 8, 2002 |
| 6458709 |
Method for fabricating a repair fuse box for a semiconductor device |
Oct. 1, 2002 |
| 6444588 |
Anti-reflective coatings and methods regarding same |
Sep. 3, 2002 |
| 6440753 |
Metal hard mask for ILD RIE processing of semiconductor memory devices to prevent oxidation of conductive lines |
Aug. 27, 2002 |
| 6440262 |
Resist mask having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer |
Aug. 27, 2002 |
| 6432832 |
Method of improving the profile angle between narrow and wide features |
Aug. 13, 2002 |
| 6424004 |
Semiconductor device having quantum dots |
Jul. 23, 2002 |
| 6413438 |
Method of forming via hole by dry etching |
Jul. 2, 2002 |
| 6399515 |
Plasma etch method for forming patterned chlorine containing plasma etchable silicon containing layer with enhanced sidewall profile uniformity |
Jun. 4, 2002 |
| 6399505 |
Method and system for copper interconnect formation |
Jun. 4, 2002 |
| 6387818 |
Method of porous dielectric formation with anodic template |
May. 14, 2002 |
| 6383918 |
Method for reducing semiconductor contact resistance |
May. 7, 2002 |
| 6372620 |
Fabrication method of wiring substrate for mounting semiconductor element and semiconductor device |
Apr. 16, 2002 |
| 6368980 |
Resist mark having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer and method for manufacturing semiconductor wafer having it |
Apr. 9, 2002 |
| 6365509 |
Semiconductor manufacturing method using a dielectric photomask |
Apr. 2, 2002 |
| 6362112 |
Single step etched moat |
Mar. 26, 2002 |
| 6352937 |
Method for stripping organic based film |
Mar. 5, 2002 |
| 6339008 |
Method of manufacturing a semiconductor memory device |
Jan. 15, 2002 |
| 6325676 |
Gas etchant composition and method for simultaneously etching silicon oxide and polysilicon, and method for manufacturing semiconductor device using the same |
Dec. 4, 2001 |
| 6319844 |
Method of manufacturing semiconductor device with via holes reaching interconnect layers having different top-surface widths |
Nov. 20, 2001 |
| 6319815 |
Electric wiring forming method with use of embedding material |
Nov. 20, 2001 |
| 6313019 |
Y-gate formation using damascene processing |
Nov. 6, 2001 |
| 6297166 |
Method for modifying nested to isolated offsets |
Oct. 2, 2001 |
| 6294099 |
Method of processing circular patterning |
Sep. 25, 2001 |
| 6277761 |
Method for fabricating stacked vias |
Aug. 21, 2001 |
| 6277716 |
Method of reduce gate oxide damage by using a multi-step etch process with a predictable premature endpoint system |
Aug. 21, 2001 |
| 6277733 |
Oxygen-free, dry plasma process for polymer removal |
Aug. 21, 2001 |
| 6268283 |
Method for forming dual damascene structure |
Jul. 31, 2001 |
| 6265321 |
Air bridge process for forming air gaps |
Jul. 24, 2001 |
| 6261960 |
High density contacts having rectangular cross-section for dual damascene applications |
Jul. 17, 2001 |
| 6258497 |
Precise endpoint detection for etching processes |
Jul. 10, 2001 |
| 6251797 |
Method of fabricating semiconductor device |
Jun. 26, 2001 |
| 6248666 |
Process of manufacturing a semiconductor device including a buried channel field effect transistor |
Jun. 19, 2001 |
| 6239037 |
Autoaligned etching process for realizing word lines and improving the reliability of semiconductor integrated memory devices |
May. 29, 2001 |
| 6225234 |
In situ and ex situ hardmask process for STI with oxide collar application |
May. 1, 2001 |
| 6214713 |
Two step cap nitride deposition for forming gate electrodes |
Apr. 10, 2001 |
| 6207574 |
Method for fabricating a DRAM cell storage node |
Mar. 27, 2001 |
| 6207571 |
Self-aligned contact formation for semiconductor devices |
Mar. 27, 2001 |
| 6184151 |
Method for forming cornered images on a substrate and photomask formed thereby |
Feb. 6, 2001 |
| 6180440 |
Method of fabricating a recessed-gate FET without producing voids in the gate metal |
Jan. 30, 2001 |
| 6180535 |
Approach to the spacer etch process for CMOS image sensor |
Jan. 30, 2001 |
| 6177352 |
Method for producing semiconductor bodies with an MOVPE layer sequence |
Jan. 23, 2001 |
| 6165910 |
Self-aligned contacts for semiconductor device |
Dec. 26, 2000 |
| 6130479 |
Nickel alloy films for reduced intermetallic formation in solder |
Oct. 10, 2000 |
| 6121157 |
Semiconductor device and its manufacture |
Sep. 19, 2000 |
| 6117792 |
Method for manufacturing semiconductor device |
Sep. 12, 2000 |
| 6103619 |
Method of forming a dual damascene structure on a semiconductor wafer |
Aug. 15, 2000 |
| 6093970 |
Semiconductor device and method for manufacturing the same |
Jul. 25, 2000 |
| 6087269 |
Method of making an interconnect using a tungsten hard mask |
Jul. 11, 2000 |
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