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Class Information
Number: 438/737
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate > Substrate possessing multiple layers
Description: Processes wherein the semiconductor substrate undergoing etching possesses plural layers.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6852472 |
Polysilicon hard mask etch defect particle removal |
Feb. 8, 2005 |
| 6853076 |
Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
Feb. 8, 2005 |
| 6829757 |
Method and apparatus for generating multi-layer routes |
Dec. 7, 2004 |
| 6818545 |
Low fabrication cost, fine pitch and high reliability solder bump |
Nov. 16, 2004 |
| 6818547 |
Dual damascene process |
Nov. 16, 2004 |
| 6815353 |
Multi-layer film stack polish stop |
Nov. 9, 2004 |
| 6790766 |
Method of fabricating semiconductor device having low dielectric constant insulator film |
Sep. 14, 2004 |
| 6787875 |
Self-aligned vias in an integrated circuit structure |
Sep. 7, 2004 |
| 6780753 |
Airgap for semiconductor devices |
Aug. 24, 2004 |
| 6770575 |
Method for improving thermal stability of fluorinated amorphous carbon low dielectric constant materials |
Aug. 3, 2004 |
| 6764946 |
Method of controlling line edge roughness in resist films |
Jul. 20, 2004 |
| 6756314 |
Method for etching a hard mask layer and a metal layer |
Jun. 29, 2004 |
| 6743712 |
Method of making a semiconductor device by forming a masking layer with a tapered etch profile |
Jun. 1, 2004 |
| 6743735 |
Photoresist removal from alignment marks through wafer edge exposure |
Jun. 1, 2004 |
| 6734107 |
Pitch reduction in semiconductor fabrication |
May. 11, 2004 |
| 6727179 |
Method for creating an integrated circuit stage wherein fine and large patterns coexist |
Apr. 27, 2004 |
| 6723655 |
Methods for fabricating a semiconductor device |
Apr. 20, 2004 |
| 6716760 |
Method for forming a gate of a high integration semiconductor device including forming an etching prevention or etch stop layer and anti-reflection layer |
Apr. 6, 2004 |
| 6706637 |
Dual damascene aperture formation method absent intermediate etch stop layer |
Mar. 16, 2004 |
| 6696307 |
Patterned phase shift layers for wavelength-selectable vertical cavity surface-emitting laser (VCSEL) arrays |
Feb. 24, 2004 |
| 6696222 |
Dual damascene process using metal hard mask |
Feb. 24, 2004 |
| 6694612 |
Mask film having a non-parting portion |
Feb. 24, 2004 |
| 6669858 |
Integrated low k dielectrics and etch stops |
Dec. 30, 2003 |
| 6670280 |
Methods of microstructuring ferroelectric materials |
Dec. 30, 2003 |
| 6664604 |
Metal gate stack with etch stop layer |
Dec. 16, 2003 |
| 6649996 |
In situ and ex situ hardmask process for STI with oxide collar application |
Nov. 18, 2003 |
| 6649533 |
Method and apparatus for forming an under bump metallurgy layer |
Nov. 18, 2003 |
| 6647994 |
Method of resist stripping over low-k dielectric material |
Nov. 18, 2003 |
| 6632734 |
Parallel plane substrate |
Oct. 14, 2003 |
| 6630397 |
Method to improve surface uniformity of a layer of arc used for the creation of contact plugs |
Oct. 7, 2003 |
| 6624077 |
Integrated circuit waveguide |
Sep. 23, 2003 |
| 6602432 |
Electroabsorption modulator, and fabricating method of the same |
Aug. 5, 2003 |
| 6600231 |
Functional device unit and method of producing the same |
Jul. 29, 2003 |
| 6593230 |
Method of manufacturing semiconductor device |
Jul. 15, 2003 |
| 6586340 |
Wafer processing apparatus and wafer processing method using the same |
Jul. 1, 2003 |
| 6579790 |
Dual damascene manufacturing process |
Jun. 17, 2003 |
| 6576152 |
Dry etching method |
Jun. 10, 2003 |
| 6562188 |
Resist mask for measuring the accuracy of overlaid layers |
May. 13, 2003 |
| 6559063 |
Method for manufacturing semiconductor wafer having resist mask with measurement marks for measuring the accuracy of overlay of a photomask |
May. 6, 2003 |
| 6551940 |
Undoped silicon dioxide as etch mask for patterning of doped silicon dioxide |
Apr. 22, 2003 |
| 6548406 |
Method for forming integrated circuit having MONOS device and mixed-signal circuit |
Apr. 15, 2003 |
| 6541389 |
Method of patterning a thin layer by chemical etching |
Apr. 1, 2003 |
| 6537904 |
Method for manufacturing a semiconductor device having a fluorine containing carbon inter-layer dielectric film |
Mar. 25, 2003 |
| 6524964 |
Method for forming contact by using ArF lithography |
Feb. 25, 2003 |
| 6518164 |
Etching process for forming the trench with high aspect ratio |
Feb. 11, 2003 |
| 6511911 |
Metal gate stack with etch stop layer |
Jan. 28, 2003 |
| 6500768 |
Method for selective removal of ONO layer |
Dec. 31, 2002 |
| 6500767 |
Method of etching semiconductor metallic layer |
Dec. 31, 2002 |
| 6482747 |
Plasma treatment method and plasma treatment apparatus |
Nov. 19, 2002 |
| 6475884 |
Devices and methods for addressing optical edge effects in connection with etched trenches |
Nov. 5, 2002 |
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