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Class Information
Number: 438/737
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate > Substrate possessing multiple layers
Description: Processes wherein the semiconductor substrate undergoing etching possesses plural layers.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7351303 |
Microfluidic systems and components |
Apr. 1, 2008 |
| 7312158 |
Method of forming pattern |
Dec. 25, 2007 |
| 7297627 |
Multilayer substrate |
Nov. 20, 2007 |
| 7294908 |
Method of forming a gate pattern in a semiconductor device |
Nov. 13, 2007 |
| 7282455 |
Method of producing a diffraction grating |
Oct. 16, 2007 |
| 7282447 |
Method for an integrated circuit contact |
Oct. 16, 2007 |
| 7265060 |
Bi-level resist structure and fabrication method for contact holes on semiconductor substrates |
Sep. 4, 2007 |
| 7261825 |
Method for the production of a micromechanical device, particularly a micromechanical oscillating mirror device |
Aug. 28, 2007 |
| 7259106 |
Method of making a microelectronic and/or optoelectronic circuitry sheet |
Aug. 21, 2007 |
| 7259063 |
Method for forming a gate electrode in a non volatile memory device |
Aug. 21, 2007 |
| 7253113 |
Methods for using a silylation technique to reduce cell pitch in semiconductor devices |
Aug. 7, 2007 |
| 7217631 |
Semiconductor device and method for fabricating the device |
May. 15, 2007 |
| 7217619 |
Method for fabricating memory components |
May. 15, 2007 |
| 7195927 |
Process for making magnetic memory structures having different-sized memory cell layers |
Mar. 27, 2007 |
| 7172960 |
Multi-layer film stack for extinction of substrate reflections during patterning |
Feb. 6, 2007 |
| 7153710 |
Etching method, method of manufacturing semiconductor device, and semiconductor device |
Dec. 26, 2006 |
| 7138340 |
Method for fabricating semiconductor device without damaging hard mask during contact formation process |
Nov. 21, 2006 |
| 7138341 |
Process for making a memory structure |
Nov. 21, 2006 |
| 7135360 |
Liquid crystal display device and method of fabricating the same |
Nov. 14, 2006 |
| 7125733 |
Method for producing an optical emission module having at least two vertically emitting lasers |
Oct. 24, 2006 |
| 7122482 |
Methods for fabricating patterned features utilizing imprint lithography |
Oct. 17, 2006 |
| 7109126 |
Method of manufacturing a semiconductor integrated circuit device |
Sep. 19, 2006 |
| 7109127 |
Manufacturing method of semiconductor device |
Sep. 19, 2006 |
| 7087532 |
Formation of controlled sublithographic structures |
Aug. 8, 2006 |
| 7078339 |
Method of forming metal line layer in semiconductor device |
Jul. 18, 2006 |
| 7067390 |
Method for forming isolation layer of semiconductor device |
Jun. 27, 2006 |
| 7064069 |
Substrate thinning including planarization |
Jun. 20, 2006 |
| 7041567 |
Isolation structure for trench capacitors and fabrication method thereof |
May. 9, 2006 |
| 7015516 |
Led packages having improved light extraction |
Mar. 21, 2006 |
| 7015149 |
Simplified dual damascene process |
Mar. 21, 2006 |
| 7012291 |
Monolithic three-dimensional structures |
Mar. 14, 2006 |
| 7011929 |
Method for forming multiple spacer widths |
Mar. 14, 2006 |
| 6991953 |
Microelectronic mechanical system and methods |
Jan. 31, 2006 |
| 6982228 |
Methods of etching a contact opening over a node location on a semiconductor substrate |
Jan. 3, 2006 |
| 6967156 |
Method to fabricate aligned dual damascene openings |
Nov. 22, 2005 |
| 6956292 |
Bumping process to increase bump height and to create a more robust bump structure |
Oct. 18, 2005 |
| 6951824 |
Method for manufacturing a micromechanical component and a component that is manufactured in accordance with the method |
Oct. 4, 2005 |
| 6929957 |
Magnetic random access memory designs with patterned and stabilized magnetic shields |
Aug. 16, 2005 |
| 6913990 |
Method of forming isolation dummy fill structures |
Jul. 5, 2005 |
| 6887791 |
Optimization methods for on-chip interconnect geometries suitable for ultra deep sub-micron processes |
May. 3, 2005 |
| 6884670 |
Dry etching with reduced damage to MOS device |
Apr. 26, 2005 |
| 6875688 |
Method for reactive ion etch processing of a dual damascene structure |
Apr. 5, 2005 |
| 6869886 |
Process for etching a metal layer system |
Mar. 22, 2005 |
| 6869887 |
Method for manufacturing thin film semiconductor device and method for forming resist pattern thereof |
Mar. 22, 2005 |
| 6867116 |
Fabrication method of sub-resolution pitch for integrated circuits |
Mar. 15, 2005 |
| 6861367 |
Semiconductor processing method using photoresist and an antireflective coating |
Mar. 1, 2005 |
| 6861347 |
Method for forming metal wiring layer of semiconductor device |
Mar. 1, 2005 |
| 6858153 |
Integrated low K dielectrics and etch stops |
Feb. 22, 2005 |
| 6852472 |
Polysilicon hard mask etch defect particle removal |
Feb. 8, 2005 |
| 6853076 |
Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
Feb. 8, 2005 |
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