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Class Information
Number: 438/736
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate > Utilizing multilayered mask
Description: Processes wherein selected regions of the semiconductor substrate are protected from the effects of the etching gas through use of a mask composed of plural layers.


Patents under this class:
1 2 3 4 5 6

Patent Number Title Of Patent Date Issued
7387969 Top patterned hardmask and method for patterning Jun. 17, 2008
7381654 Method for fabricating right-angle holes in a substrate Jun. 3, 2008
7381655 Mandrel/trim alignment in SIT processing Jun. 3, 2008
7368394 Etch methods to form anisotropic features for high aspect ratio applications May. 6, 2008
7361588 Etch process for CD reduction of arc material Apr. 22, 2008
7361607 Method for multi-layer resist plasma etch Apr. 22, 2008
7358182 Method of forming an interconnect structure Apr. 15, 2008
7354866 Cluster tool and method for process integration in manufacture of a gate structure of a field effect transistor Apr. 8, 2008
7351666 Layout and process to contact sub-lithographic structures Apr. 1, 2008
7341952 Multi-layer hard mask structure for etching deep trench in substrate Mar. 11, 2008
7341955 Method for fabricating semiconductor device Mar. 11, 2008
7338897 Method of fabricating a semiconductor device having metal wiring Mar. 4, 2008
7335980 Hardmask for reliability of silicon based dielectrics Feb. 26, 2008
7326651 Method for forming damascene structure utilizing planarizing material coupled with compressive diffusion barrier material Feb. 5, 2008
7326650 Method of etching dual damascene structure Feb. 5, 2008
7326648 Semiconductor device and fabrication process of forming silicide layer on a polysilicon pattern by reducing thickness of metal layer before forming silicide layer on the polysilicon pattern Feb. 5, 2008
RE40007 In-situ strip process for polysilicon etching in deep sub-micron technology Jan. 22, 2008
7319074 Method of defining polysilicon patterns Jan. 15, 2008
7312158 Method of forming pattern Dec. 25, 2007
7309656 Method for forming step channel of semiconductor device Dec. 18, 2007
7303949 High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture Dec. 4, 2007
7300597 Selective etch process of a sacrificial light absorbing material (SLAM) over a dielectric material Nov. 27, 2007
7300883 Method for patterning sub-lithographic features in semiconductor manufacturing Nov. 27, 2007
7300884 Pattern forming method, underlayer film forming composition, and method of manufacturing semiconductor device Nov. 27, 2007
7297559 Method of fabricating memory and memory Nov. 20, 2007
7294579 Method for forming contact opening Nov. 13, 2007
RE39913 Method to control gate CD Nov. 6, 2007
7282451 Methods of forming integrated circuit devices having metal interconnect layers therein Oct. 16, 2007
7282440 Integrated circuit contact Oct. 16, 2007
7282447 Method for an integrated circuit contact Oct. 16, 2007
7273812 Microprobe tips and methods for making Sep. 25, 2007
7262138 Organic BARC with adjustable etch rate Aug. 28, 2007
7259045 Method for fabricating a thin film transistor using a half-tone mask Aug. 21, 2007
7259089 Semiconductor device manufacturing method that includes forming a wiring pattern with a mask layer that has a tapered shape Aug. 21, 2007
7256129 Method for fabricating semiconductor device Aug. 14, 2007
7244644 Undercut and residual spacer prevention for dual stressed layers Jul. 17, 2007
7241634 Semiconductor device and method for producing the same Jul. 10, 2007
7223703 Method of forming patterns May. 29, 2007
7220679 Method for forming patterns in a semiconductor device May. 22, 2007
7214626 Etching process for decreasing mask defect May. 8, 2007
7211519 Method for manufacturing semiconductor device May. 1, 2007
7208405 Insulating film forming method capable of enhancing adhesion of silicon carbide film, etc. and semiconductor device Apr. 24, 2007
7205241 Method for manufacturing semiconductor device with contact body extended in direction of bit line Apr. 17, 2007
7195927 Process for making magnetic memory structures having different-sized memory cell layers Mar. 27, 2007
7192880 Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching Mar. 20, 2007
7193228 EUV light source optical elements Mar. 20, 2007
7183224 Liftoff process for thin photoresist Feb. 27, 2007
7172969 Method and system for etching a film stack Feb. 6, 2007
7169712 Method for manufacturing a microlens Jan. 30, 2007
7153780 Method and apparatus for self-aligned MOS patterning Dec. 26, 2006

1 2 3 4 5 6


 
 
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