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Class Information
Number: 438/735
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate
Description: Processes directed to (a) contact only selected surface areas of the substrate with the etchant to remove a constituent part of the substrate at the selected surface areas only or (b) cause the substrate to be treated at different rates in different areas to produce a nonuniform surface.


Sub-classes under this class:

Class Number Class Name Patents
438/737 Substrate possessing multiple layers 186
438/736 Utilizing multilayered mask 257


Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
6238580 Method of HF vapor release of microstructures May. 29, 2001
6235628 Method of forming dual damascene arrangement for metal interconnection with low k dielectric constant materials and oxide middle etch stop layer May. 22, 2001
6225234 In situ and ex situ hardmask process for STI with oxide collar application May. 1, 2001
6225217 Method of manufacturing semiconductor device having multilayer wiring May. 1, 2001
6218310 RTA methods for treating a deep-UV resist mask prior to gate formation etch to improve gate profile Apr. 17, 2001
6215114 Optical probe for detecting or irradiating light and near-field optical microscope having such probe and manufacturing method of such probe Apr. 10, 2001
6200865 Use of sacrificial dielectric structure to form semiconductor device with a self-aligned threshold adjust and overlying low-resistance gate Mar. 13, 2001
6200877 Method of forming a charge storage electrode having a selective hemispherical grains silicon film in a semiconductor device Mar. 13, 2001
6197687 Method of patterning field dielectric regions in a semiconductor device Mar. 6, 2001
6190991 Method for fabricating a capacitor Feb. 20, 2001
6187688 Pattern formation method Feb. 13, 2001
6184146 Plasma producing tools, dual-source plasma etchers, dual-source plasma etching methods, and method of forming planar coil dual-source plasma etchers Feb. 6, 2001
6171972 Fracture-resistant micromachined devices Jan. 9, 2001
6165910 Self-aligned contacts for semiconductor device Dec. 26, 2000
6162736 Process for fabricating a semiconductor integrated circuit utilizing an exposure method Dec. 19, 2000
6153485 Salicide formation on narrow poly lines by pulling back of spacer Nov. 28, 2000
6153466 Method for increasing capacitance Nov. 28, 2000
6146948 Method for manufacturing a thin oxide for use in semiconductor integrated circuits Nov. 14, 2000
6140225 Method of manufacturing semiconductor device having multilayer wiring Oct. 31, 2000
6133153 Self-aligned contacts for semiconductor device Oct. 17, 2000
6133157 Dry etching method of a silicon thin film Oct. 17, 2000
6121156 Contact monitor, method of forming same and method of analyzing contact-, via-and/or trench-forming processes in an integrated circuit Sep. 19, 2000
6121145 Method of fabricating via and interconnection Sep. 19, 2000
6121153 Semiconductor device having a regrowth crystal region Sep. 19, 2000
6114252 Plasma processing tools, dual-source plasma etchers, dual-source plasma etching methods, and methods of forming planar coil dual-source plasma etchers Sep. 5, 2000
6103603 Method of fabricating gate electrodes of twin-well CMOS device Aug. 15, 2000
6103619 Method of forming a dual damascene structure on a semiconductor wafer Aug. 15, 2000
6100202 Pre deposition stabilization method for forming a void free isotropically etched anisotropically patterned doped silicate glass layer Aug. 8, 2000
6090715 Masking process for forming self-aligned dual wells or self-aligned field-doping regions Jul. 18, 2000
6087269 Method of making an interconnect using a tungsten hard mask Jul. 11, 2000
6083849 Methods of forming hemispherical grain polysilicon Jul. 4, 2000
6077787 Method for radiofrequency wave etching Jun. 20, 2000
6074569 Stripping method for photoresist used as mask in Ch.sub.4 /H.sub.2 based reactive ion etching (RIE) of compound semiconductors Jun. 13, 2000
6071825 Fully overlapped nitride-etch defined device and processing sequence Jun. 6, 2000
6071823 Deep trench bottle-shaped etch in centura mark II NG Jun. 6, 2000
6060398 Guard cell for etching May. 9, 2000
6057240 Aqueous surfactant solution method for stripping metal plasma etch deposited oxidized metal impregnated polymer residue layers from patterned metal layers May. 2, 2000
6043157 Semiconductor device having dual gate electrode material and process of fabrication thereof Mar. 28, 2000
6020270 Bomine and iodine etch process for silicon and silicides Feb. 1, 2000
6017824 Passivation etching procedure, using a polysilicon stop layer, for repairing embedded DRAM cells Jan. 25, 2000
6008138 Process for making micromechanical structures Dec. 28, 1999
6004631 Apparatus and method of removing unnecessary matter and coating process using such method Dec. 21, 1999
5989445 Microchannel system for fluid delivery Nov. 23, 1999
5990009 Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit Nov. 23, 1999
5980763 Electronic device manufacture Nov. 9, 1999
5976980 Method and apparatus providing a mechanical probe structure in an integrated circuit die Nov. 2, 1999
5972232 Micromirror for a hybrid optoelectronic integrated circuit, a method for manufacturing the same, a micromirror-photodetector assembly and an assembly of hybrid optoelectronic integrated circui Oct. 26, 1999
5970344 Method of manufacturing semiconductor device having gate electrodes formed in trench structure before formation of source layers Oct. 19, 1999
5955380 Endpoint detection method and apparatus Sep. 21, 1999
5952247 Method of accessing the circuitry on a semiconductor substrate from the bottom of the semiconductor substrate Sep. 14, 1999

1 2 3 4 5


 
 
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