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Class Information
Number: 438/735
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching) > Differential etching of semiconductor substrate
Description: Processes directed to (a) contact only selected surface areas of the substrate with the etchant to remove a constituent part of the substrate at the selected surface areas only or (b) cause the substrate to be treated at different rates in different areas to produce a nonuniform surface.


Sub-classes under this class:

Class Number Class Name Patents
438/737 Substrate possessing multiple layers 186
438/736 Utilizing multilayered mask 257


Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
6503838 Integrated circuit isolation of functionally distinct RF circuits Jan. 7, 2003
6498089 Semiconductor integrated circuit device with moisture-proof ring and its manufacture method Dec. 24, 2002
6489248 Method and apparatus for etch passivating and etching a substrate Dec. 3, 2002
6475884 Devices and methods for addressing optical edge effects in connection with etched trenches Nov. 5, 2002
6475841 Transistor with shaped gate electrode and method therefor Nov. 5, 2002
6468918 In situ photoresist hot bake in loading chamber of dry etch Oct. 22, 2002
6468919 Method of making a local interconnect in an embedded memory Oct. 22, 2002
6448184 Formation of diamond particle interconnects Sep. 10, 2002
6448094 Method of detecting etching depth Sep. 10, 2002
6444566 Method of making borderless contact having a sion buffer layer Sep. 3, 2002
6444588 Anti-reflective coatings and methods regarding same Sep. 3, 2002
6440837 Method of forming a contact structure in a semiconductor device Aug. 27, 2002
6436229 Gas phase silicon etching with bromine trifluoride Aug. 20, 2002
6428713 MEMS sensor structure and microfabrication process therefor Aug. 6, 2002
6426238 Charge transfer device and solid image pickup apparatus using the same Jul. 30, 2002
6402974 Method for etching polysilicon to have a smooth surface Jun. 11, 2002
6403495 Capacitor fabricating method of semiconductor device Jun. 11, 2002
6403494 Method of forming a floating gate self-aligned to STI on EEPROM Jun. 11, 2002
6399505 Method and system for copper interconnect formation Jun. 4, 2002
6395644 Process for fabricating a semiconductor device using a silicon-rich silicon nitride ARC May. 28, 2002
6391788 Two etchant etch method May. 21, 2002
6387797 Method for reducing the capacitance between interconnects by forming voids in dielectric material May. 14, 2002
6383937 Method of fabricating a silicon island May. 7, 2002
6376389 Method for eliminating anti-reflective coating in semiconductors Apr. 23, 2002
6368980 Resist mark having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer and method for manufacturing semiconductor wafer having it Apr. 9, 2002
6362113 Method of forming pattern Mar. 26, 2002
6346455 Method to form a corrugated structure for enhanced capacitance Feb. 12, 2002
6329296 Metal catalyst technique for texturing silicon solar cells Dec. 11, 2001
6319654 Process for forming a photoresist pattern by top surface imaging process Nov. 20, 2001
6319797 Process for manufacturing a semiconductor device Nov. 20, 2001
6319844 Method of manufacturing semiconductor device with via holes reaching interconnect layers having different top-surface widths Nov. 20, 2001
6309962 Film stack and etching sequence for dual damascene Oct. 30, 2001
6309974 Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible Oct. 30, 2001
6306774 Method of forming a wordline Oct. 23, 2001
6306772 Deep trench bottle-shaped etching using Cl2 gas Oct. 23, 2001
6303515 Method of forming a capacitor Oct. 16, 2001
6297170 Sacrificial multilayer anti-reflective coating for mos gate formation Oct. 2, 2001
6294450 Nanoscale patterning for the formation of extensive wires Sep. 25, 2001
6294099 Method of processing circular patterning Sep. 25, 2001
6290631 Method for restoring an alignment mark after planarization of a dielectric layer Sep. 18, 2001
6291334 Etch stop layer for dual damascene process Sep. 18, 2001
6291357 Method and apparatus for etching a substrate with reduced microloading Sep. 18, 2001
6287979 Method for forming an air gap as low dielectric constant material using buckminsterfullerene as a porogen in an air bridge or a sacrificial layer Sep. 11, 2001
6277716 Method of reduce gate oxide damage by using a multi-step etch process with a predictable premature endpoint system Aug. 21, 2001
6274393 Method for measuring submicron images Aug. 14, 2001
6274503 Etching method for doped polysilicon layer Aug. 14, 2001
6268295 Method of manufacturing semiconductor device Jul. 31, 2001
6265304 Controlling an etching process of multiple layers based upon thickness ratio of the dielectric layers Jul. 24, 2001
6248666 Process of manufacturing a semiconductor device including a buried channel field effect transistor Jun. 19, 2001
6242363 Method of etching a wafer layer using a sacrificial wall to form vertical sidewall Jun. 5, 2001

1 2 3 4 5


 
 
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