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Class Information
Number: 438/706
Name: Semiconductor device manufacturing: process > Chemical etching > Vapor phase etching (i.e., dry etching)
Description: Processes wherein the chemical etchant is in a gaseous state when brought into contact with the semiconductive substrate.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6797633 |
In-situ plasma ash/treatment after via etch of low-k films for poison-free dual damascene trench patterning |
Sep. 28, 2004 |
| 6797634 |
Method of conditioning an etching chamber and method of processing semiconductor substrate using the etching chamber |
Sep. 28, 2004 |
| 6797635 |
Fabrication method for lines of semiconductor device |
Sep. 28, 2004 |
| 6797636 |
Process of fabricating DRAM cells with collar isolation layers |
Sep. 28, 2004 |
| 6797637 |
Semiconductor device fabrication method |
Sep. 28, 2004 |
| 6793832 |
Plasma etching method |
Sep. 21, 2004 |
| 6793833 |
Etching method of organic insulating film |
Sep. 21, 2004 |
| 6794230 |
Approach to improve line end shortening |
Sep. 21, 2004 |
| 6794294 |
Etch process that resists notching at electrode bottom |
Sep. 21, 2004 |
| 6794295 |
Method to improve stability and reliability of CVD low K dielectric |
Sep. 21, 2004 |
| 6794296 |
Aperture in a semiconductor material, and the production and use thereof |
Sep. 21, 2004 |
| 6794297 |
Method for etching an antireflective coating and for fabricating a semiconductor device |
Sep. 21, 2004 |
| 6790376 |
Process control based upon weight or mass measurements, and systems for accomplishing same |
Sep. 14, 2004 |
| 6790782 |
Process for fabrication of a transistor gate including high-K gate dielectric with in-situ resist trim, gate etch, and high-K dielectric removal |
Sep. 14, 2004 |
| 6786998 |
Wafer temperature control apparatus and method |
Sep. 7, 2004 |
| 6787054 |
Two-stage etching process |
Sep. 7, 2004 |
| 6787457 |
Method of etching and anti-reflection film using substituted hydrocarbon with halogen gas |
Sep. 7, 2004 |
| 6787472 |
Utilization of disappearing silicon hard mask for fabrication of semiconductor structures |
Sep. 7, 2004 |
| 6787474 |
Manufacture method for semiconductor device having silicon-containing insulating film |
Sep. 7, 2004 |
| 6787484 |
Method of reducing visible light induced arcing in a semiconductor wafer manufacturing process |
Sep. 7, 2004 |
| 6784108 |
Gas pulsing for etch profile control |
Aug. 31, 2004 |
| 6784109 |
Method for fabricating semiconductor devices including wiring forming with a porous low-k film and copper |
Aug. 31, 2004 |
| 6784110 |
Method of etching shaped features on a substrate |
Aug. 31, 2004 |
| 6779247 |
Method of producing suspended elements for electrical connection between two portions of a micromechanism which can move relative to one another |
Aug. 24, 2004 |
| 6780336 |
Methods of fabricating MEMS and microfluidic devices using latent masking technique |
Aug. 24, 2004 |
| 6780775 |
Design of lithography alignment and overlay measurement marks on CMP finished damascene surface |
Aug. 24, 2004 |
| 6780776 |
Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer |
Aug. 24, 2004 |
| 6780777 |
Method for forming metal layer of semiconductor device |
Aug. 24, 2004 |
| 6780778 |
Method for fabricating semiconductor device |
Aug. 24, 2004 |
| 6780779 |
Method of fabricating semiconductor device |
Aug. 24, 2004 |
| 6780780 |
Method for removing Si-needles of wafer |
Aug. 24, 2004 |
| 6776851 |
In-situ cleaning of a polymer coated plasma processing chamber |
Aug. 17, 2004 |
| 6777342 |
Method of plasma etching platinum |
Aug. 17, 2004 |
| 6774040 |
Apparatus and method for surface finishing a silicon film |
Aug. 10, 2004 |
| 6774044 |
Reducing photoresist shrinkage via plasma treatment |
Aug. 10, 2004 |
| 6770564 |
Method of etching metallic thin film on thin film resistor |
Aug. 3, 2004 |
| 6770565 |
System for planarizing metal conductive layers |
Aug. 3, 2004 |
| 6767773 |
Method of Production of a thin film type semiconductor device having a heat-retaining layer |
Jul. 27, 2004 |
| 6767832 |
In situ liner barrier |
Jul. 27, 2004 |
| 6767833 |
Method for damascene reworking |
Jul. 27, 2004 |
| 6767836 |
Method of cleaning a CVD reaction chamber using an active oxygen species |
Jul. 27, 2004 |
| 6764939 |
Semiconductor device and method of manufacturing the same |
Jul. 20, 2004 |
| 6764947 |
Method for reducing gate line deformation and reducing gate line widths in semiconductor devices |
Jul. 20, 2004 |
| 6762096 |
Method for forming a polysilicon spacer with a vertical profile |
Jul. 13, 2004 |
| 6762124 |
Method for patterning a multilayered conductor/substrate structure |
Jul. 13, 2004 |
| 6762125 |
Modified facet etch to prevent blown gate oxide and increase etch chamber life |
Jul. 13, 2004 |
| 6762129 |
Dry etching method, fabrication method for semiconductor device, and dry etching apparatus |
Jul. 13, 2004 |
| 6762130 |
Method of photolithographically forming extremely narrow transistor gate elements |
Jul. 13, 2004 |
| 6758223 |
Plasma RIE polymer removal |
Jul. 6, 2004 |
| 6759252 |
Method and device using titanium doped aluminum oxide for passivation of ferroelectric materials |
Jul. 6, 2004 |
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