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Class Information
Number: 438/703
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Plural coating steps
Description: Processes having multiple material deposition steps.










Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12

Patent Number Title Of Patent Date Issued
5441849 Method of forming pattern and making semiconductor device using radiation-induced conductive resin bottom resist layer Aug. 15, 1995
5439552 Process of fabricating an enlongated microstructure element on a substrate Aug. 8, 1995
5432117 Method of producing semiconductor device Jul. 11, 1995
5426073 Method of fabricating semiconductor devices using an intermediate grinding step Jun. 20, 1995
5426076 Dielectric deposition and cleaning process for improved gap filling and device planarization Jun. 20, 1995
5422306 Method of forming semiconductor hetero interfaces Jun. 6, 1995
5418173 Method of reducing ionic contamination in integrated circuit fabrication May. 23, 1995
5416048 Method to slope conductor profile prior to dielectric deposition to improve dielectric step-coverage May. 16, 1995
5407529 Method for manufacturing semiconductor device Apr. 18, 1995
5389560 Process for production of stacked capacitor of semiconductor device Feb. 14, 1995
5384273 Method of making a semiconductor device having a short gate length Jan. 24, 1995
5382551 Method for reducing the effects of semiconductor substrate deformities Jan. 17, 1995
5376225 Method of forming fine structure on compound semiconductor with inclined ion beam etching Dec. 27, 1994
5376227 Multilevel resist process Dec. 27, 1994
5376585 Method for forming titanium tungsten local interconnect for integrated circuits Dec. 27, 1994
5372677 Method of manufacturing semiconductor devices Dec. 13, 1994
5369299 Tamper resistant integrated circuit structure Nov. 29, 1994
5364800 Varying the thickness of the surface silicon layer in a silicon-on-insulator substrate Nov. 15, 1994
5364804 Nitride cap sidewall oxide protection from BOE etch Nov. 15, 1994
5362685 Method for achieving a high quality thin oxide in integrated circuit devices Nov. 8, 1994
5358892 Etch stop useful in avoiding substrate pitting with poly buffered locos Oct. 25, 1994
5352618 Method for forming thin tunneling windows in EEPROMs Oct. 4, 1994
5340770 Method of making a shallow junction by using first and second SOG layers Aug. 23, 1994
5338395 Method for enhancing etch uniformity useful in etching submicron nitride features Aug. 16, 1994
5338750 Fabrication method to produce pit-free polysilicon buffer local oxidation isolation Aug. 16, 1994
5332696 Method for manufacturing a silicon layer having increased surface area Jul. 26, 1994
5332470 Process for manufacturing calibration structures particularly for the calibration of machines for measuring alignment in integrated circuits in general Jul. 26, 1994
5330920 Method of controlling gate oxide thickness in the fabrication of semiconductor devices Jul. 19, 1994
5330879 Method for fabrication of close-tolerance lines and sharp emission tips on a semiconductor wafer Jul. 19, 1994
5316619 Capacitive surface micromachine absolute pressure sensor and method for processing May. 31, 1994
5316981 Method for achieving a high quality thin oxide using a sacrificial oxide anneal May. 31, 1994
5310457 Method of integrated circuit fabrication including selective etching of silicon and silicon compounds May. 10, 1994
5300463 Method of selectively etching silicon dioxide dielectric layers on semiconductor wafers Apr. 5, 1994
5296410 Method for separating fine patterns of a semiconductor device Mar. 22, 1994
5286607 Bi-layer resist process for semiconductor processing Feb. 15, 1994
5282922 Hybrid circuit structures and methods of fabrication Feb. 1, 1994
5283205 Method for manufacturing a semiconductor device on a substrate having an anisotropic expansion/contraction characteristic Feb. 1, 1994
5281304 Process for forming copper wiring Jan. 25, 1994
5281557 Soluble oxides for integrated circuit fabrication formed by the incomplete dissociation of the precursor gas Jan. 25, 1994
5270264 Process for filling submicron spaces with dielectric Dec. 14, 1993
5256248 Method for patterning semiconductor Oct. 26, 1993
5252520 Integrated circuit interlevel dielectric wherein the first and second dielectric layers are formed with different densities Oct. 12, 1993
5246884 CVD diamond or diamond-like carbon for chemical-mechanical polish etch stop Sep. 21, 1993
5227341 Method of manufacturing a semiconductor device using an isopropyl alcohol ashing step Jul. 13, 1993
5223081 Method for roughening a silicon or polysilicon surface for a semiconductor substrate Jun. 29, 1993
5200347 Method for improving the radiation hardness of an integrated circuit bipolar transistor Apr. 6, 1993
5194403 Method for the making of the electrode metallizations of a transistor Mar. 16, 1993
5186788 Fine pattern forming method Feb. 16, 1993
5169494 Fine pattern forming method Dec. 8, 1992
5164339 Fabrication of oxynitride frontside microstructures Nov. 17, 1992

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