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Class Information
Number: 438/702
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Formation of groove or trench > Plural coating steps
Description: Processes wherein the viahole or trench is formed by a process having multiple material deposition steps.


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13

Patent Number Title Of Patent Date Issued
5023204 Method of manufacturing semiconductor device using silicone protective layer Jun. 11, 1991
5013680 Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography May. 7, 1991
5013689 Method of forming a passivation film May. 7, 1991
5011568 Use of sol-gel derived tantalum oxide as a protective coating for etching silicon Apr. 30, 1991
5010039 Method of forming contacts to a semiconductor device Apr. 23, 1991
5006485 Method of manufacturing an intergrated circuit including steps for forming interconnections between patterns formed at different levels Apr. 9, 1991
5004703 Multiple trench semiconductor structure method Apr. 2, 1991
5002902 Method for fabricating a semiconductor device including the step of forming an alignment mark Mar. 26, 1991
5001085 Process for creating a metal etch mask which may be utilized for halogen-plasma excavation of deep trenches Mar. 19, 1991
4990467 Method of preventing residue on an insulator layer in the fabrication of a semiconductor device Feb. 5, 1991
4987101 Method for providing improved insulation in VLSI and ULSI circuits Jan. 22, 1991
4977105 Method for manufacturing interconnection structure in semiconductor device Dec. 11, 1990
4966870 Method for making borderless contacts Oct. 30, 1990
4960727 Method for forming a dielectric filled trench Oct. 2, 1990
4956312 Method of manufacturing a semiconductor device Sep. 11, 1990
4954218 Method for etching a pattern Sep. 4, 1990
4944682 Method of forming borderless contacts Jul. 31, 1990
4945069 Organic space holder for trench processing Jul. 31, 1990
4933305 Process of wire bonding for semiconductor device Jun. 12, 1990
4900692 Method of forming an oxide liner and active area mask for selective epitaxial growth in an isolation trench Feb. 13, 1990
4892635 Pattern transfer process utilizing multilevel resist structure for fabricating integrated-circuit devices Jan. 9, 1990
4890370 Manufacturing method for integrated resonator Jan. 2, 1990
4883767 Method of fabricating self aligned semiconductor devices Nov. 28, 1989
4859622 Method of making a trench capacitor for dram Aug. 22, 1989
4837176 Integrated circuit structures having polycrystalline electrode contacts and process Jun. 6, 1989
4821094 Gate alignment procedure in fabricating semiconductor devices Apr. 11, 1989
4818725 Technique for forming planarized gate structure Apr. 4, 1989
4808552 Process for making vertically-oriented interconnections for VLSI devices Feb. 28, 1989
4807016 Dry etch of phosphosilicate glass with selectivity to undoped oxide Feb. 21, 1989
4801350 Method for obtaining submicron features from optical lithography technology Jan. 31, 1989
4799990 Method of self-aligning a trench isolation structure to an implanted well region Jan. 24, 1989
4780428 Mosfet semiconductor device and manufacturing method thereof Oct. 25, 1988
4757033 Semiconductor device manufacturing by sequential ion and wet etchings prior to lift-off metallization Jul. 12, 1988
4750971 Method of manufacturing a semiconductor device Jun. 14, 1988
4741802 Method for manufacturing semiconductor device May. 3, 1988
4735681 Fabrication method for sub-micron trench Apr. 5, 1988
4732871 Process for producing undercut dummy gate mask profiles for MESFETs Mar. 22, 1988
4728997 Method of fabricating a light image detector and a linear image detector obtained by this method Mar. 1, 1988
4717689 Method of forming semimicron grooves in semiconductor material Jan. 5, 1988
4717449 Dielectric barrier material Jan. 5, 1988
4715109 Method of forming a high density vertical stud titanium silicide for reachup contact applications Dec. 29, 1987
4714518 Dual layer encapsulation coating for III-V semiconductor compounds Dec. 22, 1987
4707218 Lithographic image size reduction Nov. 17, 1987
4692998 Process for fabricating semiconductor components Sep. 15, 1987
4693781 Trench formation process Sep. 15, 1987
4686763 Method of making a planar polysilicon bipolar device Aug. 18, 1987
4686000 Self-aligned contact process Aug. 11, 1987
4683024 Device fabrication method using spin-on glass resins Jul. 28, 1987
4679306 Self-aligned process for forming dielectrically isolating regions formed in semiconductor device Jul. 14, 1987
4675984 Method of exposing only the top surface of a mesa Jun. 30, 1987

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