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Class Information
Number: 438/700
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Formation of groove or trench
Description: Processes wherein at least one groove or trench is formed by a combination of chemical etching and material deposition.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6977227 |
Method of etching bottle trench and fabricating capacitor with same |
Dec. 20, 2005 |
| 6974756 |
Methods of forming shallow trench isolation |
Dec. 13, 2005 |
| 6974770 |
Self-aligned mask to reduce cell layout area |
Dec. 13, 2005 |
| 6974772 |
Integrated low-k hard mask |
Dec. 13, 2005 |
| 6972240 |
Forming of close thin trenches |
Dec. 6, 2005 |
| 6972241 |
Method of forming an STI feature to avoid electrical charge leakage |
Dec. 6, 2005 |
| 6972258 |
Method for selectively controlling damascene CD bias |
Dec. 6, 2005 |
| 6972259 |
Method for forming openings in low dielectric constant material layer |
Dec. 6, 2005 |
| 6972260 |
Method of fabricating flash memory cell |
Dec. 6, 2005 |
| 6969683 |
Method of preventing resist poisoning in dual damascene structures |
Nov. 29, 2005 |
| 6967146 |
Isolation region forming methods |
Nov. 22, 2005 |
| 6964899 |
Semiconductor device and method of manufacturing the same |
Nov. 15, 2005 |
| 6964910 |
Methods of forming conductive capacitor plug in a memory array |
Nov. 15, 2005 |
| 6964912 |
Method for fabricating a semiconductor structure |
Nov. 15, 2005 |
| 6964924 |
Integrated circuit process monitoring and metrology system |
Nov. 15, 2005 |
| 6964926 |
Method of forming geometric deep trench capacitors |
Nov. 15, 2005 |
| 6960529 |
Methods for sidewall protection of metal interconnect for unlanded vias using physical vapor deposition |
Nov. 1, 2005 |
| 6958276 |
Method of manufacturing trench-type MOSFET |
Oct. 25, 2005 |
| 6955988 |
Method of forming a cavity and SOI in a semiconductor substrate |
Oct. 18, 2005 |
| 6955989 |
Use of a U-groove as an alternative to using a V-groove for protection against dicing induced damage in silicon |
Oct. 18, 2005 |
| 6953752 |
Reduced silicon gouging and common source line resistance in semiconductor devices |
Oct. 11, 2005 |
| 6949430 |
Semiconductor processing methods |
Sep. 27, 2005 |
| 6949460 |
Line edge roughness reduction for trench etch |
Sep. 27, 2005 |
| 6949467 |
Forming method of contact in semiconductor device and manufacturing method of PMOS device using the same |
Sep. 27, 2005 |
| 6946390 |
Photolithographic production of trenches in a substrate |
Sep. 20, 2005 |
| 6943092 |
Methods of manufacturing semiconductor devices |
Sep. 13, 2005 |
| 6939805 |
Method of etching a layer in a trench and method of fabricating a trench capacitor |
Sep. 6, 2005 |
| 6939806 |
Etching memory |
Sep. 6, 2005 |
| 6940170 |
Techniques for triple and quadruple damascene fabrication |
Sep. 6, 2005 |
| 6936383 |
Method of defining the dimensions of circuit elements by using spacer deposition techniques |
Aug. 30, 2005 |
| 6936510 |
Semiconductor device with self-aligned contact and its manufacture |
Aug. 30, 2005 |
| 6936541 |
Method for planarizing metal interconnects |
Aug. 30, 2005 |
| 6933237 |
Substrate etch method and device |
Aug. 23, 2005 |
| 6933238 |
Method for manufacturing semiconductor device |
Aug. 23, 2005 |
| 6930027 |
Method of manufacturing a semiconductor component |
Aug. 16, 2005 |
| 6930038 |
Dual damascene partial gap fill polymer fabrication process |
Aug. 16, 2005 |
| 6930052 |
Method for producing an integrated circuit having at least one metalicized surface |
Aug. 16, 2005 |
| 6927138 |
Method of semiconductor device fabrication |
Aug. 9, 2005 |
| 6927160 |
Fabrication of copper-containing region such as electrical interconnect |
Aug. 9, 2005 |
| 6927169 |
Method and apparatus to improve thickness uniformity of surfaces for integrated device manufacturing |
Aug. 9, 2005 |
| 6927174 |
Site-specific method for large area uniform thickness plan view transmission electron microscopy sample preparation |
Aug. 9, 2005 |
| 6924230 |
Method for forming a conductive layer |
Aug. 2, 2005 |
| 6921699 |
Method for manufacturing a semiconductor device with a trench termination |
Jul. 26, 2005 |
| 6919255 |
Semiconductor trench structure |
Jul. 19, 2005 |
| 6919277 |
Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions |
Jul. 19, 2005 |
| 6916737 |
Methods of manufacturing a semiconductor device |
Jul. 12, 2005 |
| 6916743 |
Semiconductor device and method for manufacturing thereof |
Jul. 12, 2005 |
| 6916744 |
Method and apparatus for planarization of a material by growing a sacrificial film with customized thickness profile |
Jul. 12, 2005 |
| 6916745 |
Structure and method for forming a trench MOSFET having self-aligned features |
Jul. 12, 2005 |
| 6913871 |
Fabricating sub-resolution structures in planar lightwave devices |
Jul. 5, 2005 |
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