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Class Information
Number: 438/700
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Formation of groove or trench
Description: Processes wherein at least one groove or trench is formed by a combination of chemical etching and material deposition.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6548410 |
Method of fabricating wires for semiconductor devices |
Apr. 15, 2003 |
| 6544905 |
Metal gate trim process by using self assembled monolayers |
Apr. 8, 2003 |
| 6541369 |
Method and apparatus for reducing fixed charges in a semiconductor device |
Apr. 1, 2003 |
| 6537733 |
Method of depositing low dielectric constant silicon carbide layers |
Mar. 25, 2003 |
| 6537895 |
Method of forming shallow trench isolation in a silicon wafer |
Mar. 25, 2003 |
| 6537914 |
Integrated circuit device isolation methods using high selectivity chemical-mechanical polishing |
Mar. 25, 2003 |
| 6537917 |
Method for fabricating electrically insulating layers |
Mar. 25, 2003 |
| 6534367 |
Trench-gate semiconductor devices and their manufacture |
Mar. 18, 2003 |
| 6534415 |
Method of removing polymer residues after tungsten etch back |
Mar. 18, 2003 |
| 6531067 |
Method for forming contact hole |
Mar. 11, 2003 |
| 6531265 |
Method to planarize semiconductor surface |
Mar. 11, 2003 |
| 6531778 |
Semiconductor device and method of production thereof |
Mar. 11, 2003 |
| 6528426 |
Integrated circuit interconnect and method |
Mar. 4, 2003 |
| 6528428 |
Method of forming dual damascene structure |
Mar. 4, 2003 |
| 6524963 |
Method to improve etching of organic-based, low dielectric constant materials |
Feb. 25, 2003 |
| 6521538 |
Method of forming a trench with a rounded bottom in a semiconductor device |
Feb. 18, 2003 |
| 6518144 |
Semiconductor device having trenches and process for same |
Feb. 11, 2003 |
| 6518174 |
Combined resist strip and barrier etch process for dual damascene structures |
Feb. 11, 2003 |
| 6518194 |
Intermediate transfer layers for nanoscale pattern transfer and nanostructure formation |
Feb. 11, 2003 |
| 6514860 |
Integration of organic fill for dual damascene process |
Feb. 4, 2003 |
| 6511908 |
Method of manufacturing a dual damascene structure using boron nitride as trench etching stop film |
Jan. 28, 2003 |
| 6511916 |
Method for removing the photoresist layer in the damascene process |
Jan. 28, 2003 |
| 6509240 |
Angle implant process for cellular deep trench sidewall doping |
Jan. 21, 2003 |
| 6506660 |
Semiconductor with nanoscale features |
Jan. 14, 2003 |
| 6503840 |
Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning |
Jan. 7, 2003 |
| 6503842 |
Plasmaless dry contact cleaning method using interhalogen compounds |
Jan. 7, 2003 |
| 6498072 |
Process for producing semiconductor device |
Dec. 24, 2002 |
| 6498105 |
Method of forming fine patterns of a semiconductor device |
Dec. 24, 2002 |
| 6495411 |
Technique to improve deep trench capacitance by increasing surface thereof |
Dec. 17, 2002 |
| 6495451 |
Method of forming interconnect |
Dec. 17, 2002 |
| 6495464 |
Method and apparatus for fixed abrasive substrate preparation and use in a cluster CMP tool |
Dec. 17, 2002 |
| 6492276 |
Hard masking method for forming residue free oxygen containing plasma etched layer |
Dec. 10, 2002 |
| 6489234 |
Method of making a semiconductor device |
Dec. 3, 2002 |
| 6486059 |
Dual damascene process using an oxide liner for a dielectric barrier layer |
Nov. 26, 2002 |
| 6482701 |
Integrated gate bipolar transistor and method of manufacturing the same |
Nov. 19, 2002 |
| 6482744 |
Two step plasma etch using variable electrode spacing |
Nov. 19, 2002 |
| 6479388 |
Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines |
Nov. 12, 2002 |
| 6479394 |
Method of low-selective etching of dissimilar materials having interfaces at non-perpendicular angles to the etch propagation direction |
Nov. 12, 2002 |
| 6475811 |
System for and method of using bacteria to aid in contact hole printing |
Nov. 5, 2002 |
| 6472318 |
Method of fabricating semiconductor device having trench interconnection |
Oct. 29, 2002 |
| 6472324 |
Method of manufacturing trench type element isolation structure |
Oct. 29, 2002 |
| 6468909 |
Isolation and/or removal of ionic contaminants from planarization fluid compositions using macrocyclic polyethers and methods of using such compositions |
Oct. 22, 2002 |
| 6468910 |
Slurry for chemical mechanical polishing silicon dioxide |
Oct. 22, 2002 |
| 6465296 |
Vertical source/drain contact semiconductor |
Oct. 15, 2002 |
| 6465351 |
Method of forming a capacitor lower electrode using a CMP stopping layer |
Oct. 15, 2002 |
| 6465352 |
Method for removing dry-etching residue in a semiconductor device fabricating process |
Oct. 15, 2002 |
| 6465355 |
Method of fabricating suspended microstructures |
Oct. 15, 2002 |
| 6465358 |
Post etch clean sequence for making a semiconductor device |
Oct. 15, 2002 |
| 6461226 |
Chemical mechanical polishing of a metal layer using a composite polishing pad |
Oct. 8, 2002 |
| 6461533 |
Etchant for silicon oxide and method |
Oct. 8, 2002 |
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