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Class Information
Number: 438/699
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Planarization by etching and coating > Plural coating steps
Description: Processes having multiple material deposition steps are utilized in the planarization of the surface.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5173448 |
Process for fabricating a semiconductor device |
Dec. 22, 1992 |
| 5173151 |
Method of dry etching in semiconductor device processing |
Dec. 22, 1992 |
| 5173439 |
Forming wide dielectric-filled isolation trenches in semi-conductors |
Dec. 22, 1992 |
| 5162254 |
Semiconductor device having a SOI substrate and fabrication method thereof |
Nov. 10, 1992 |
| 5157002 |
Method for forming a mask pattern for contact hole |
Oct. 20, 1992 |
| 5143866 |
Dry etching method for refractory metals, refractory metal silicides, and other refractory metal compounds |
Sep. 1, 1992 |
| 5139608 |
Method of planarizing a semiconductor device surface |
Aug. 18, 1992 |
| 5112776 |
Method for planarizing an integrated circuit structure using low melting inorganic material and flowing while depositing |
May. 12, 1992 |
| 5110410 |
Zinc sulfide planarization |
May. 5, 1992 |
| 5110763 |
Process of fabricating multi-level wiring structure, incorporated in semiconductor device |
May. 5, 1992 |
| 5084419 |
Method of manufacturing semiconductor device using chemical-mechanical polishing |
Jan. 28, 1992 |
| 5084130 |
Method for depositing material on depressions |
Jan. 28, 1992 |
| 5079188 |
Method for the production of a semiconductor device |
Jan. 7, 1992 |
| 5077238 |
Method of manufacturing a semiconductor device with a planar interlayer insulating film |
Dec. 31, 1991 |
| 5077234 |
Planarization process utilizing three resist layers |
Dec. 31, 1991 |
| 5068207 |
Method for producing a planar surface in integrated circuit manufacturing |
Nov. 26, 1991 |
| 5026666 |
Method of making integrated circuits having a planarized dielectric |
Jun. 25, 1991 |
| 5022958 |
Method of etching for integrated circuits with planarized dielectric |
Jun. 11, 1991 |
| 5015602 |
Method of manufacturing a semiconductor device having a planarized construction |
May. 14, 1991 |
| 5006485 |
Method of manufacturing an intergrated circuit including steps for forming interconnections between patterns formed at different levels |
Apr. 9, 1991 |
| 4996165 |
Self-aligned dielectric assisted planarization process |
Feb. 26, 1991 |
| 4986878 |
Process for improved planarization of the passivation layers for semiconductor devices |
Jan. 22, 1991 |
| 4983545 |
Planarization of dielectric films on integrated circuits |
Jan. 8, 1991 |
| 4977108 |
Method of making self-aligned, planarized contacts for semiconductor devices |
Dec. 11, 1990 |
| 4962064 |
Method of planarization of topologies in integrated circuit structures |
Oct. 9, 1990 |
| 4962063 |
Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing |
Oct. 9, 1990 |
| 4960727 |
Method for forming a dielectric filled trench |
Oct. 2, 1990 |
| 4954459 |
Method of planarization of topologies in integrated circuit structures |
Sep. 4, 1990 |
| 4948459 |
Method of enabling electrical connection to a substructure forming part of an electronic device |
Aug. 14, 1990 |
| 4946550 |
Forming electrical connections for electronic devices |
Aug. 7, 1990 |
| 4916087 |
Method of manufacturing a semiconductor device by filling and planarizing narrow and wide trenches |
Apr. 10, 1990 |
| 4894351 |
Method for making a silicon IC with planar double layer metal conductors system |
Jan. 16, 1990 |
| 4892845 |
Method for forming contacts through a thick oxide layer on a semiconductive device |
Jan. 9, 1990 |
| 4892614 |
Integrated circuit isolation process |
Jan. 9, 1990 |
| 4879257 |
Planarization process |
Nov. 7, 1989 |
| 4876216 |
Semiconductor integrated circuit manufacturing process providing oxide-filled trench isolation of circuit devices |
Oct. 24, 1989 |
| 4876223 |
Method of manufacturing semiconductor devices |
Oct. 24, 1989 |
| 4876217 |
Method of forming semiconductor structure isolation regions |
Oct. 24, 1989 |
| 4872947 |
CVD of silicon oxide using TEOS decomposition and in-situ planarization process |
Oct. 10, 1989 |
| 4842675 |
Integrated circuit isolation process |
Jun. 27, 1989 |
| 4836885 |
Planarization process for wide trench isolation |
Jun. 6, 1989 |
| 4829025 |
Process for patterning films in manufacture of integrated circuit structures |
May. 9, 1989 |
| 4826786 |
Method for forming a multilayered metal network for bonding components of a high-density integrated circuit, and integrated circuit produced thereby |
May. 2, 1989 |
| 4824802 |
Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures |
Apr. 25, 1989 |
| 4810669 |
Method of fabricating a semiconductor device |
Mar. 7, 1989 |
| 4806504 |
Planarization method |
Feb. 21, 1989 |
| 4799990 |
Method of self-aligning a trench isolation structure to an implanted well region |
Jan. 24, 1989 |
| 4800176 |
Method for forming contact portion in semiconductor integrated circuit devices |
Jan. 24, 1989 |
| 4789648 |
Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias |
Dec. 6, 1988 |
| 4783238 |
Planarized insulation isolation |
Nov. 8, 1988 |
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