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Class Information
Number: 438/699
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Planarization by etching and coating > Plural coating steps
Description: Processes having multiple material deposition steps are utilized in the planarization of the surface.


Patents under this class:
1 2 3 4 5 6 7 8

Patent Number Title Of Patent Date Issued
5378318 Planarization Jan. 3, 1995
5371046 Method to solve sog non-uniformity in the VLSI process Dec. 6, 1994
5366850 Submicron planarization process with passivation on metal line Nov. 22, 1994
5356513 Polishstop planarization method and structure Oct. 18, 1994
5356828 Method of forming micro-trench isolation regions in the fabrication of semiconductor devices Oct. 18, 1994
5354715 Thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process Oct. 11, 1994
5350486 Semiconductor planarization process Sep. 27, 1994
5346584 Planarization process for IC trench isolation using oxidized polysilicon filler Sep. 13, 1994
5347100 Semiconductor device, process for the production thereof and apparatus for microwave plasma treatment Sep. 13, 1994
5346587 Planarization of a gate electrode for improved gate patterning over non-planar active area isolation Sep. 13, 1994
5344797 Method of forming interlevel dielectric for integrated circuits Sep. 6, 1994
5342480 Method of manufacturing a semiconductor integrated circuit device Aug. 30, 1994
5340774 Semiconductor fabrication technique using local planarization with self-aligned transistors Aug. 23, 1994
5332694 Process for manufacturing a semiconductor device Jul. 26, 1994
5332467 Chemical/mechanical polishing for ULSI planarization Jul. 26, 1994
5328553 Method for fabricating a semiconductor device having a planar surface Jul. 12, 1994
5326727 Method for integrated circuit fabrication including linewidth control during etching Jul. 5, 1994
5324690 Semiconductor device having a ternary boron nitride film and a method for forming the same Jun. 28, 1994
5324689 Critical dimension control with a planarized underlayer Jun. 28, 1994
5316965 Method of decreasing the field oxide etch rate in isolation technology May. 31, 1994
5312512 Global planarization using SOG and CMP May. 17, 1994
5310700 Conductor capacitance reduction in integrated circuits May. 10, 1994
5300188 Process for making substantially smooth diamond Apr. 5, 1994
5296092 Planarization method for a semiconductor substrate Mar. 22, 1994
5294294 Method of dry etching in semiconductor device processing Mar. 15, 1994
5294296 Method for manufacturing a contact hole of a semiconductor device Mar. 15, 1994
5292689 Method for planarizing semiconductor structure using subminimum features Mar. 8, 1994
5290396 Trench planarization techniques Mar. 1, 1994
5284804 Global planarization process Feb. 8, 1994
5272117 Method for planarizing a layer of material Dec. 21, 1993
5272115 Method of leveling the laminated surface of a semiconductor substrate Dec. 21, 1993
5270264 Process for filling submicron spaces with dielectric Dec. 14, 1993
5266446 Method of making a multilayer thin film structure Nov. 30, 1993
5266525 Microelectronic interlayer dielectric structure and methods of manufacturing same Nov. 30, 1993
5250472 Spin-on-glass integration planarization having siloxane partial etchback and silicate processes Oct. 5, 1993
5244841 Method for planarizing an integrated circuit structure using low melting inorganic material and flowing while depositing Sep. 14, 1993
5245213 Planarized semiconductor product Sep. 14, 1993
5242853 Manufacturing process for a semiconductor device using bias ECRCVD and an etch stop layer Sep. 7, 1993
5236861 Manufacturing method of metal-insulator-semiconductor device using trench isolation technique Aug. 17, 1993
5231052 Process for forming a multilayer polysilicon semiconductor electrode Jul. 27, 1993
5231044 Method of making semiconductor memory elements Jul. 27, 1993
5223084 Simultaneous dielectric planarization and contact hole etching Jun. 29, 1993
5217926 Method of passivating a semiconductor wafer Jun. 8, 1993
5213657 Method for making uniform the thickness of a Si single crystal thin film May. 25, 1993
5212114 Process for global planarizing of surfaces for integrated semiconductor circuits May. 18, 1993
5204288 Method for planarizing an integrated circuit structure using low melting inorganic material Apr. 20, 1993
5192715 Process for avoiding spin-on-glass cracking in high aspect ratio cavities Mar. 9, 1993
5187119 Multichip module and integrated circuit substrates having planarized patterned surfaces Feb. 16, 1993
5187121 Process for fabrication of a semiconductor structure and contact stud Feb. 16, 1993
5175122 Planarization process for trench isolation in integrated circuit manufacture Dec. 29, 1992

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