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Class Information
Number: 438/698
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Planarization by etching and coating > Utilizing reflow
Description: Processes wherein the planarization method requires decreasing the viscosity of a layer residing on the substrate in order to fluidize the same.


Patents under this class:
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Patent Number Title Of Patent Date Issued
7575995 Method of forming fine metal pattern and method of forming metal line using the same Aug. 18, 2009
7544621 Method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process and etching method Jun. 9, 2009
7507618 Method for making electronic devices using metal oxide nanoparticles Mar. 24, 2009
7479455 Method for manufacturing semiconductor wafer Jan. 20, 2009
7410863 Methods of forming and using memory cell structures Aug. 12, 2008
7357873 Polymide thin film self-assembly process Apr. 15, 2008
7348278 Method of making nitride-based compound semiconductor crystal and substrate Mar. 25, 2008
7335255 Manufacturing method of semiconductor device Feb. 26, 2008
7264976 Advance ridge structure for microlens gapless approach Sep. 4, 2007
7226865 Process for forming pattern and method for producing liquid crystal display apparatus Jun. 5, 2007
7192867 Protection of low-k dielectric in a passivation level Mar. 20, 2007
7176087 Methods of forming electrical connections Feb. 13, 2007
7144817 Etching solutions and processes for manufacturing flexible wiring boards Dec. 5, 2006
7060623 Method of deforming a pattern and semiconductor device formed by utilizing deformed pattern Jun. 13, 2006
7053407 Liquid crystal display device and method for manufacturing the same May. 30, 2006
7022579 Method for filling via with metal Apr. 4, 2006
7022608 Method and composition for the removal of residual materials during substrate planarization Apr. 4, 2006
6979526 Lithography alignment and overlay measurement marks formed by resist mask blocking for MRAMs Dec. 27, 2005
6972259 Method for forming openings in low dielectric constant material layer Dec. 6, 2005
6916743 Semiconductor device and method for manufacturing thereof Jul. 12, 2005
6914000 Polishing method, polishing system and process-managing system Jul. 5, 2005
6803308 Method of forming a dual damascene pattern in a semiconductor device Oct. 12, 2004
6774042 Planarization method for deep sub micron shallow trench isolation process Aug. 10, 2004
6753259 Method of improving the bondability between Au wires and Cu bonding pads Jun. 22, 2004
6746888 Display and fabricating method thereof Jun. 8, 2004
6743724 Planarization process for semiconductor substrates Jun. 1, 2004
6716739 Bump manufacturing method Apr. 6, 2004
6682820 Recession resistant coated ceramic part Jan. 27, 2004
6645865 Methods, apparatuses and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes Nov. 11, 2003
6639285 Method for fabricating a semiconductor device Oct. 28, 2003
6627551 Method for avoiding microscratch in interlevel dielectric layer chemical mechanical polishing process Sep. 30, 2003
6620534 Film having enhanced reflow characteristics at low thermal budget Sep. 16, 2003
6617252 Monolithic low dielectric constant platform for passive components and method Sep. 9, 2003
6602793 Pre-clean chamber Aug. 5, 2003
6555461 Method of forming low resistance barrier on low k interconnect Apr. 29, 2003
6531353 Method for fabricating semiconductor device Mar. 11, 2003
6479389 Method of doping copper metallization Nov. 12, 2002
6451181 Method of forming a semiconductor device barrier layer Sep. 17, 2002
6423638 Filter apparatus and method therefor Jul. 23, 2002
6413870 Process of removing CMP scratches by BPSG reflow and integrated circuit chip formed thereby Jul. 2, 2002
6368957 Semiconductor device and method for manufacturing semiconductor device Apr. 9, 2002
6342448 Method of fabricating barrier adhesion to low-k dielectric layers in a copper damascene process Jan. 29, 2002
6331488 Planarization process for semiconductor substrates Dec. 18, 2001
6277748 Method for manufacturing a planar reflective light valve backplane Aug. 21, 2001
6277754 Method of planarizing dielectric layer Aug. 21, 2001
6245688 Dry Air/N2 post treatment to avoid the formation of B/P precipitation after BPSG film deposition Jun. 12, 2001
6225227 Method for manufacturing semiconductor device May. 1, 2001
6184137 Structure and method for improving low temperature copper reflow in semiconductor features Feb. 6, 2001
6180510 Method of manufacturing a substantially flat surface of a semiconductor device through a polishing operation Jan. 30, 2001
6177337 Method of reducing metal voids in semiconductor device interconnection Jan. 23, 2001

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