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Class Information
Number: 438/697
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Planarization by etching and coating
Description: Processes wherein at least one surface of the semiconductor substrate is leveled through a combination of chemical etching and material deposition.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6316833 |
Semiconductor device with multilayer interconnection having HSQ film with implanted fluorine and fluorine preventing liner |
Nov. 13, 2001 |
| 6309809 |
Multi-layer integrated imaging/image recording process with improved image tolerances |
Oct. 30, 2001 |
| 6303043 |
Method of fabricating preserve layer |
Oct. 16, 2001 |
| 6303431 |
Method of fabricating bit lines |
Oct. 16, 2001 |
| 6290631 |
Method for restoring an alignment mark after planarization of a dielectric layer |
Sep. 18, 2001 |
| 6287956 |
Multilevel interconnecting structure in semiconductor device and method of forming the same |
Sep. 11, 2001 |
| 6288357 |
Ion milling planarization of semiconductor workpieces |
Sep. 11, 2001 |
| 6280644 |
Method of planarizing a surface on an integrated circuit |
Aug. 28, 2001 |
| 6280645 |
Wafer flattening process and system |
Aug. 28, 2001 |
| 6277747 |
Method for removal of etch residue immediately after etching a SOG layer |
Aug. 21, 2001 |
| 6277748 |
Method for manufacturing a planar reflective light valve backplane |
Aug. 21, 2001 |
| 6277751 |
Method of planarization |
Aug. 21, 2001 |
| 6265315 |
Method for improving chemical/mechanical polish uniformity over rough topography for semiconductor integrated circuits |
Jul. 24, 2001 |
| 6255226 |
Optimized metal etch process to enable the use of aluminum plugs |
Jul. 3, 2001 |
| 6251790 |
Method for fabricating contacts in a semiconductor device |
Jun. 26, 2001 |
| 6248651 |
Low cost method of fabricating transient voltage suppressor semiconductor devices or the like |
Jun. 19, 2001 |
| 6242355 |
Method for insulating metal conductors by spin-on-glass and devices made |
Jun. 5, 2001 |
| 6242356 |
Etchback method for forming microelectronic layer with enhanced surface smoothness |
Jun. 5, 2001 |
| 6242352 |
Method of preventing micro-scratches on the surface of a semiconductor wafer when performing a CMP process |
Jun. 5, 2001 |
| 6239011 |
Method of self-aligned contact hole etching by fluorine-containing discharges |
May. 29, 2001 |
| 6239020 |
Method for forming interlayer dielectric layer |
May. 29, 2001 |
| 6239034 |
Method of manufacturing inter-metal dielectric layers for semiconductor devices |
May. 29, 2001 |
| 6235637 |
Method for marking a wafer without inducing flat edge particle problem |
May. 22, 2001 |
| 6232231 |
Planarized semiconductor interconnect topography and method for polishing a metal layer to form interconnect |
May. 15, 2001 |
| 6228772 |
Method of removing surface defects or other recesses during the formation of a semiconductor device |
May. 8, 2001 |
| 6221560 |
Method to enhance global planarization of silicon oxide surface for IC device fabrication |
Apr. 24, 2001 |
| 6214735 |
Method for planarizing a semiconductor substrate |
Apr. 10, 2001 |
| 6200901 |
Polishing polymer surfaces on non-porous CMP pads |
Mar. 13, 2001 |
| 6197671 |
Multiple finger polysilicon gate structure and method of making |
Mar. 6, 2001 |
| 6197691 |
Shallow trench isolation process |
Mar. 6, 2001 |
| 6194313 |
Method for reducing recess for the formation of local interconnect and or plug trench fill for etchback process |
Feb. 27, 2001 |
| 6191026 |
Method for submicron gap filling on a semiconductor substrate |
Feb. 20, 2001 |
| 6191037 |
Methods, apparatuses and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes |
Feb. 20, 2001 |
| 6191040 |
Wafer surface treatment methods and systems using electrocapillarity |
Feb. 20, 2001 |
| 6187683 |
Method for final passivation of integrated circuit |
Feb. 13, 2001 |
| 6184143 |
Semiconductor integrated circuit device and fabrication process thereof |
Feb. 6, 2001 |
| 6177360 |
Process for manufacture of integrated circuit device |
Jan. 23, 2001 |
| 6174815 |
Method for planarizing DRAM cells |
Jan. 16, 2001 |
| 6171962 |
Shallow trench isolation formation without planarization mask |
Jan. 9, 2001 |
| 6162690 |
Methods of forming field effect transistors having self-aligned intermediate source and drain contacts |
Dec. 19, 2000 |
| 6159858 |
Slurry containing manganese oxide and a fabrication process of a semiconductor device using such a slurry |
Dec. 12, 2000 |
| 6156631 |
Method of manufacturing semiconductor device |
Dec. 5, 2000 |
| 6153478 |
STI process for eliminating kink effect |
Nov. 28, 2000 |
| 6153528 |
Method of fabricating a dual damascene structure |
Nov. 28, 2000 |
| 6153525 |
Methods for chemical mechanical polish of organic polymer dielectric films |
Nov. 28, 2000 |
| 6150273 |
Method of fabricating a kink-effect-free shallow trench isolations |
Nov. 21, 2000 |
| 6150276 |
Method for fabricating metal-oxide semiconductor transistor |
Nov. 21, 2000 |
| 6147001 |
Method of manufacturing semiconductor integrated circuit device |
Nov. 14, 2000 |
| 6143664 |
Method of planarizing a structure having an interpoly layer |
Nov. 7, 2000 |
| 6140239 |
Chemically removable Cu CMP slurry abrasive |
Oct. 31, 2000 |
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