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Class Information
Number: 438/697
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Planarization by etching and coating
Description: Processes wherein at least one surface of the semiconductor substrate is leveled through a combination of chemical etching and material deposition.










Sub-classes under this class:

Class Number Class Name Patents
438/699 Plural coating steps 453
438/698 Utilizing reflow 149


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
6667219 Methods for forming void regions, dielectric regions and capacitor constructions Dec. 23, 2003
6664129 Integrated circuits and methods for their fabrication Dec. 16, 2003
6664190 Pre STI-CMP planarization scheme Dec. 16, 2003
6656842 Barrier layer buffing after Cu CMP Dec. 2, 2003
6649471 Method of planarizing non-volatile memory device Nov. 18, 2003
6649513 Copper back-end-of-line by electropolish Nov. 18, 2003
6649514 EEPROM device having improved data retention and process for fabricating the device Nov. 18, 2003
6645865 Methods, apparatuses and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes Nov. 11, 2003
6645869 Etching back process to improve topographic planarization of a polysilicon layer Nov. 11, 2003
6635574 Method of removing material from a semiconductor substrate Oct. 21, 2003
6635546 Method and manufacturing MRAM offset cells in a damascene structure Oct. 21, 2003
6635575 Methods and apparatus to enhance properties of Si-O-C low K films Oct. 21, 2003
6633084 Semiconductor wafer for improved chemical-mechanical polishing over large area features Oct. 14, 2003
6633427 Method of forming photonic crystals using a semiconductor-based fabrication process Oct. 14, 2003
6627551 Method for avoiding microscratch in interlevel dielectric layer chemical mechanical polishing process Sep. 30, 2003
6624076 Semiconductor device and method for fabricating the same Sep. 23, 2003
6617241 Method of thick film planarization Sep. 9, 2003
6613677 Long range ordered semiconductor interface phase and oxides Sep. 2, 2003
6613675 Methods, apparatuses, and substrate assembly structures for fabricating microelectronic components using mechanical and chemical-mechanical planarization processes Sep. 2, 2003
6610603 Method of manufacturing a capacitor Aug. 26, 2003
6605537 Polishing of metal substrates Aug. 12, 2003
6605546 Dual bake for BARC fill without voids Aug. 12, 2003
6593241 Method of planarizing a semiconductor device using a high density plasma system Jul. 15, 2003
6589875 Method of selectively processing wafer edge regions to increase wafer uniformity, and system for accomplishing same Jul. 8, 2003
6583060 Dual depth trench isolation Jun. 24, 2003
6562713 Method of protecting semiconductor areas while exposing a gate May. 13, 2003
6559009 Method of fabricating a high-coupling ratio flash memory May. 6, 2003
6559030 Method of forming a recessed polysilicon filled trench May. 6, 2003
6555476 Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric Apr. 29, 2003
6544430 Methods for detaching a layer from a substrate Apr. 8, 2003
6537917 Method for fabricating electrically insulating layers Mar. 25, 2003
6531412 Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications Mar. 11, 2003
6531265 Method to planarize semiconductor surface Mar. 11, 2003
6528389 Substrate planarization with a chemical mechanical polishing stop layer Mar. 4, 2003
6521922 Passivation film on a semiconductor wafer Feb. 18, 2003
6521536 Planarization process Feb. 18, 2003
6518172 Method for applying uniform pressurized film across wafer Feb. 11, 2003
6509274 Method for forming aluminum lines over aluminum-filled vias in a semiconductor substrate Jan. 21, 2003
6498072 Process for producing semiconductor device Dec. 24, 2002
6492209 Selectively thin silicon film for creating fully and partially depleted SOI on same wafer Dec. 10, 2002
6488038 Method for cleaning semiconductor substrates Dec. 3, 2002
6482697 Method of forming a highly integrated non-volatile semiconductor memory device Nov. 19, 2002
6479394 Method of low-selective etching of dissimilar materials having interfaces at non-perpendicular angles to the etch propagation direction Nov. 12, 2002
6479389 Method of doping copper metallization Nov. 12, 2002
6475875 Shallow trench isolation elevation uniformity via insertion of a polysilicon etch layer Nov. 5, 2002
6475821 Circuit substrate, detector, and method of manufacturing the same Nov. 5, 2002
6472324 Method of manufacturing trench type element isolation structure Oct. 29, 2002
6472271 Planarization method of memory unit of flash memory Oct. 29, 2002
6465351 Method of forming a capacitor lower electrode using a CMP stopping layer Oct. 15, 2002
6461966 Method of high density plasma phosphosilicate glass process on pre-metal dielectric application for plasma damage reducing and throughput improvement Oct. 8, 2002

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