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Class Information
Number: 438/696
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Coating of sidewall
Description: Processes wherein the chemical etching and material deposition is affected so that only vertically disposed surfaces remain coated with the deposited material.


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
5366929 Method for making reliable selective via fills Nov. 22, 1994
5354418 Method for dry etching Oct. 11, 1994
5342808 Aperture size control for etched vias and metal contacts Aug. 30, 1994
5330934 Method of fabricating a semiconductor device having miniaturized contact electrode and wiring structure Jul. 19, 1994
5328860 Method of manufacturing a semiconductor device Jul. 12, 1994
5318668 Dry etching method Jun. 7, 1994
5318665 Method for etching polysilicon film Jun. 7, 1994
5312776 Method of preventing the corrosion of metallic wirings May. 17, 1994
5310456 Dry etching method May. 10, 1994
5296410 Method for separating fine patterns of a semiconductor device Mar. 22, 1994
5294296 Method for manufacturing a contact hole of a semiconductor device Mar. 15, 1994
5294295 Method for moisture sealing integrated circuits using silicon nitride spacer protection of oxide passivation edges Mar. 15, 1994
5290733 Method of manufacturing semiconductor devices including depositing aluminum on aluminum leads Mar. 1, 1994
5290728 Method for producing a semiconductor device Mar. 1, 1994
5281557 Soluble oxides for integrated circuit fabrication formed by the incomplete dissociation of the precursor gas Jan. 25, 1994
5270254 Integrated circuit metallization with zero contact enclosure requirements and method of making the same Dec. 14, 1993
5270256 Method of forming a guard wall to reduce delamination effects Dec. 14, 1993
5268070 Dry etching method Dec. 7, 1993
5268313 Method of manufacturing a semiconductor device having a spacer Dec. 7, 1993
5262002 Method for manufacturing a trench structure in a substrate Nov. 16, 1993
5252506 Method to eliminate gate filaments on field plate isolated devices Oct. 12, 1993
5242861 Method for manufacturing semiconductor device having a multilayer wiring structure Sep. 7, 1993
5240879 Method of manufacturing a semiconductor device having conductive material provided in an insulating layer Aug. 31, 1993
5240875 Selective oxidation of silicon trench sidewall Aug. 31, 1993
5236549 Process for plasma etching Aug. 17, 1993
5234852 Sloped spacer for MOS field effect devices comprising reflowable glass layer Aug. 10, 1993
5229325 Method for forming metal wirings of semiconductor device Jul. 20, 1993
5219793 Method for forming pitch independent contacts and a semiconductor device having the same Jun. 15, 1993
5217912 Method for manufacturing a semiconductor device Jun. 8, 1993
5207868 Etching process for films of aluminum or its alloys May. 4, 1993
5204285 Method for patterning a metal layer Apr. 20, 1993
5204276 Method of manufacturing semiconductor device Apr. 20, 1993
5202291 High CF.sub.4 flow-reactive ion etch for aluminum patterning Apr. 13, 1993
5200028 Etching process of silicon material Apr. 6, 1993
5198388 Method of forming interconnection patterns Mar. 30, 1993
5182234 Profile tailored trench etch using a SF.sub.6 -O.sub.2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen Jan. 26, 1993
5166097 Silicon wafers containing conductive feedthroughs Nov. 24, 1992
5143866 Dry etching method for refractory metals, refractory metal silicides, and other refractory metal compounds Sep. 1, 1992
5128278 Method of forming a wiring pattern for a semiconductor device Jul. 7, 1992
5118382 Elimination of etch stop undercut Jun. 2, 1992
5116460 Method for selectively etching a feature May. 26, 1992
5114872 Forming planar ITO gate electrode array structures May. 19, 1992
5110407 Surface fabricating device May. 5, 1992
5078833 Dry etching method Jan. 7, 1992
5074956 Pattern forming method Dec. 24, 1991
5069747 Creation and removal of temporary silicon dioxide structures on an in-process integrated circuit with minimal effect on exposed, permanent silicon dioxide structures Dec. 3, 1991
5024722 Process for fabricating conductors used for integrated circuit connections and the like Jun. 18, 1991
5023197 Manufacturing process of mesa SOI MOS transistor Jun. 11, 1991
5023203 Method of patterning fine line width semiconductor topology using a spacer Jun. 11, 1991
5019534 Process of making self-aligned contact using differential oxidation May. 28, 1991

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