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Class Information
Number: 438/696
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Coating of sidewall
Description: Processes wherein the chemical etching and material deposition is affected so that only vertically disposed surfaces remain coated with the deposited material.


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11

Patent Number Title Of Patent Date Issued
7018551 Pull-back method of forming fins in FinFets Mar. 28, 2006
7005375 Method to avoid copper contamination of a via or dual damascene structure Feb. 28, 2006
7001784 Method to control spacer width Feb. 21, 2006
6998348 Method for manufacturing electronic circuits integrated on a semiconductor substrate Feb. 14, 2006
6984858 Semiconductor device and manufacturing method thereof Jan. 10, 2006
6967165 Method for fabricating multilayer interconnect and method for checking the same Nov. 22, 2005
6960529 Methods for sidewall protection of metal interconnect for unlanded vias using physical vapor deposition Nov. 1, 2005
6960527 Method for fabricating non-volatile memory device having sidewall gate structure and SONOS cell structure Nov. 1, 2005
6960530 Method of reducing the aspect ratio of a trench Nov. 1, 2005
6953744 Methods of fabricating integrated circuit devices providing improved short prevention Oct. 11, 2005
6951809 Method for manufacturing semiconductor device Oct. 4, 2005
6951821 Processing system and method for chemically treating a substrate Oct. 4, 2005
6949467 Forming method of contact in semiconductor device and manufacturing method of PMOS device using the same Sep. 27, 2005
6946359 Method for fabricating trench isolations with high aspect ratio Sep. 20, 2005
6943118 Method of fabricating flash memory Sep. 13, 2005
6943119 Flash process for stacking poly etching Sep. 13, 2005
6936383 Method of defining the dimensions of circuit elements by using spacer deposition techniques Aug. 30, 2005
6933236 Method for forming pattern using argon fluoride photolithography Aug. 23, 2005
6924221 Integrated process flow to improve copper filling in a damascene structure Aug. 2, 2005
6924237 Method for manufacturing semiconductor integrated circuit device Aug. 2, 2005
6921695 Etching method for forming a square cornered polysilicon wordline electrode Jul. 26, 2005
6916743 Semiconductor device and method for manufacturing thereof Jul. 12, 2005
6913871 Fabricating sub-resolution structures in planar lightwave devices Jul. 5, 2005
6913976 Method of manufacturing semiconductor device Jul. 5, 2005
6913962 Manufacturing method of semiconductor device and semiconductor device Jul. 5, 2005
6911156 Methods for fabricating MRAM device structures Jun. 28, 2005
6908839 Method of producing an imaging device Jun. 21, 2005
6893893 Method of preventing short circuits in magnetic film stacks May. 17, 2005
6887802 Method of manufacturing semiconductor device and semiconductor device May. 3, 2005
6887785 Etching openings of different depths using a single mask layer method and structure May. 3, 2005
6887395 Method of forming sub-micron-size structures over a substrate May. 3, 2005
6881351 Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices Apr. 19, 2005
6872647 Method for forming multiple fins in a semiconductor device Mar. 29, 2005
6872663 Method for reworking a multi-layer photoresist following an underlayer development Mar. 29, 2005
6867139 Method of manufacturing semiconductor device Mar. 15, 2005
6855602 Method for forming a box shaped polygate Feb. 15, 2005
6852595 Method of manufacturing a flash memory cell Feb. 8, 2005
6852597 Method for fabricating power semiconductor device having trench gate structure Feb. 8, 2005
6849551 Method for forming isolation region in semiconductor device Feb. 1, 2005
6849550 Method for manufacturing semiconductor device Feb. 1, 2005
6841452 Method of forming device isolation trench Jan. 11, 2005
6838362 Process for manufacturing a through insulated interconnection in a body of semiconductor material Jan. 4, 2005
6835640 Method of forming a novel composite insulator spacer Dec. 28, 2004
6835663 Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity Dec. 28, 2004
6833327 Method of fabraicating semiconductor device Dec. 21, 2004
6833292 Reducing dopant losses during annealing processes Dec. 21, 2004
6833079 Method of etching a shaped cavity Dec. 21, 2004
6828238 Methods of forming openings extending through electrically insulative material to electrically conductive material Dec. 7, 2004
6828186 Vertical sidewall profile spacer layer and method for fabrication thereof Dec. 7, 2004
6825121 Method of manufacturing a capacitor of a semiconductor device Nov. 30, 2004

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