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Class Information
Number: 438/696
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Coating of sidewall
Description: Processes wherein the chemical etching and material deposition is affected so that only vertically disposed surfaces remain coated with the deposited material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
4849069 Method of producing filaments Jul. 18, 1989
4838991 Process for defining organic sidewall structures Jun. 13, 1989
4829025 Process for patterning films in manufacture of integrated circuit structures May. 9, 1989
4810666 Method for manufacturing a mosic having self-aligned contact holes Mar. 7, 1989
4803181 Process for forming sub-micrometer patterns using silylation of resist side walls Feb. 7, 1989
4792534 Method of manufacturing a semiconductor device involving sidewall spacer formation Dec. 20, 1988
4784719 Dry etching procedure Nov. 15, 1988
4784720 Trench etch process for a single-wafer RIE dry etch reactor Nov. 15, 1988
4783422 Process for fabricating a bipolar transistor utilizing sidewall masking over the emitter Nov. 8, 1988
4776922 Formation of variable-width sidewall structures Oct. 11, 1988
4759822 Methods for producing an aperture in a surface Jul. 26, 1988
4759821 Process for preparing a vertically differentiated transistor device Jul. 26, 1988
4755479 Manufacturing method of insulated gate field effect transistor using reflowable sidewall spacers Jul. 5, 1988
4741802 Method for manufacturing semiconductor device May. 3, 1988
4735680 Method for the self-aligned silicide formation in IC fabrication Apr. 5, 1988
4729816 Isolation formation process with active area protection Mar. 8, 1988
4728997 Method of fabricating a light image detector and a linear image detector obtained by this method Mar. 1, 1988
4722910 Partially self-aligned metal contact process Feb. 2, 1988
4713141 Anisotropic plasma etching of tungsten Dec. 15, 1987
4707218 Lithographic image size reduction Nov. 17, 1987
4702795 Trench etch process Oct. 27, 1987
4693781 Trench formation process Sep. 15, 1987
4690729 Tapered trench process Sep. 1, 1987
4667395 Method for passivating an undercut in semiconductor device preparation May. 26, 1987
4662988 Semiconductor devices and their fabrication May. 5, 1987
4648939 Formation of submicrometer lines Mar. 10, 1987
4641420 Metalization process for headless contact using deposited smoothing material Feb. 10, 1987
4575921 Silicon nitride formation and use in self-aligned semiconductor device manufacturing method Mar. 18, 1986
4533430 Process for forming slots having near vertical sidewalls at their upper extremities Aug. 6, 1985
4528066 Selective anisotropic reactive ion etching process for polysilicide composite structures Jul. 9, 1985
4521275 Plasma etch chemistry for anisotropic etching of silicon Jun. 4, 1985
4502914 Method of making structures with dimensions in the sub-micrometer range Mar. 5, 1985
4497107 Method of making self-aligned high-frequency static induction transistor Feb. 5, 1985
4490209 Plasma etching using hydrogen bromide addition Dec. 25, 1984
4481706 Process for manufacturing integrated bi-polar transistors of very small dimensions Nov. 13, 1984
4449285 Method for producing a vertical channel transistor May. 22, 1984
4450042 Plasma etch chemistry for anisotropic etching of silicon May. 22, 1984
4441931 Method of making self-aligned guard regions for semiconductor device elements Apr. 10, 1984
4436584 Anisotropic plasma etching of semiconductors Mar. 13, 1984
4375385 Plasma etching of aluminum Mar. 1, 1983
4368085 SOS island edge passivation structure Jan. 11, 1983
4356040 Semiconductor device having improved interlevel conductor insulation Oct. 26, 1982
4354896 Formation of submicron substrate element Oct. 19, 1982
4332078 Method of manufacturing a semiconductor device Jun. 1, 1982
4322883 Self-aligned metal process for integrated injection logic integrated circuits Apr. 6, 1982
4315239 Process for producing a calibrated resistance element and integrated circuitry incorporating same Feb. 9, 1982
4287661 Method for making an improved polysilicon conductor structure utilizing reactive-ion etching and thermal oxidation Sep. 8, 1981
4191603 Making semiconductor structure with improved phosphosilicate glass isolation Mar. 4, 1980
3954524 Self-aligning photoresist process for selectively opening tops of mesas in mesa-diode-array structures May. 4, 1976

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