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Class Information
Number: 438/696
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Coating of sidewall
Description: Processes wherein the chemical etching and material deposition is affected so that only vertically disposed surfaces remain coated with the deposited material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6107143 Method for forming a trench isolation structure in an integrated circuit Aug. 22, 2000
6103137 Method for etching oxide film in plasma etching system Aug. 15, 2000
6103630 Adding SF.sub.6 gas to improve metal undercut for hardmask metal etching Aug. 15, 2000
6103596 Process for etching a silicon nitride hardmask mask with zero etch bias Aug. 15, 2000
6103612 Isolated interconnect studs and method for forming the same Aug. 15, 2000
6100014 Method of forming an opening in a dielectric layer through a photoresist layer with silylated sidewall spacers Aug. 8, 2000
6087239 Disposable spacer and method of forming and using same Jul. 11, 2000
6087263 Methods of forming integrated circuitry and integrated circuitry structures Jul. 11, 2000
6071815 Method of patterning sidewalls of a trench in integrated circuit manufacturing Jun. 6, 2000
6069091 In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method May. 30, 2000
6066553 Semiconductor processing method of forming electrically conductive interconnect lines and integrated circuitry May. 23, 2000
6060398 Guard cell for etching May. 9, 2000
6051502 Methods of forming conductive components and methods of forming conductive lines Apr. 18, 2000
6051153 Etching method Apr. 18, 2000
6051501 Method of reducing overetch during the formation of a semiconductor device Apr. 18, 2000
6046089 Selectively sized spacers Apr. 4, 2000
6037261 Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material Mar. 14, 2000
6033980 Method of forming submicron contacts and vias in an integrated circuit Mar. 7, 2000
6028007 Low cost hermetic sealed microwave module packaging Feb. 22, 2000
6027860 Method for forming a structure using redeposition of etchable layer Feb. 22, 2000
6025268 Method of etching conductive lines through an etch resistant photoresist mask Feb. 15, 2000
6020267 Method for forming local interconnect metal structures via the addition of a titanium nitride anti-reflective coating Feb. 1, 2000
6017823 Method of forming a MOS field effect transistor with improved gate side wall insulation films Jan. 25, 2000
6012469 Etch residue clean Jan. 11, 2000
6008140 Copper etch using HCI and HBr chemistry Dec. 28, 1999
6008123 Method for using a hardmask to form an opening in a semiconductor substrate Dec. 28, 1999
6001414 Dual damascene processing method Dec. 14, 1999
5994226 Dry etching method Nov. 30, 1999
5994227 Method of manufacturing semiconductor device Nov. 30, 1999
5990515 Trenched gate non-volatile semiconductor device and method with corner doping and sidewall doping Nov. 23, 1999
5985761 Method of making an integrated circuit structure with planarized layer Nov. 16, 1999
5981148 Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby Nov. 9, 1999
5976986 Low pressure and low power C1.sub.2 /HC1 process for sub-micron metal etching Nov. 2, 1999
5976768 Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby Nov. 2, 1999
5972773 High quality isolation for high density and high performance integrated circuits Oct. 26, 1999
5968844 Method for etching nitride features in integrated circuit construction Oct. 19, 1999
5960315 Tapered via using sidewall spacer reflow Sep. 28, 1999
5960312 Process for forming a contact electrode Sep. 28, 1999
5939335 Method for reducing stress in the metallization of an integrated circuit Aug. 17, 1999
5933755 Method of fabricating contact sites for microelectronic devices Aug. 3, 1999
5930664 Process for preventing corrosion of aluminum bonding pads after passivation/ARC layer etching Jul. 27, 1999
5923991 Methods to prevent divot formation in shallow trench isolation areas Jul. 13, 1999
5916821 Method for producing sublithographic etching masks Jun. 29, 1999
5916823 Method for making dual damascene contact Jun. 29, 1999
5914279 Silicon nitride sidewall and top surface layer separating conductors Jun. 22, 1999
5893758 Etching method for reducing cusping at openings Apr. 13, 1999
5891805 Method of forming contacts Apr. 6, 1999
5885890 Method of forming contact openings and an electric component formed from the same and other methods Mar. 23, 1999
5882535 Method for forming a hole in a semiconductor device Mar. 16, 1999
5879998 Adaptively controlled, self-aligned, short channel device and method for manufacturing same Mar. 9, 1999

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