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Class Information
Number: 438/696
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Coating of sidewall
Description: Processes wherein the chemical etching and material deposition is affected so that only vertically disposed surfaces remain coated with the deposited material.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7608536 |
Method of manufacturing contact opening |
Oct. 27, 2009 |
| 7595250 |
Semiconductor device and method of manufacturing the same |
Sep. 29, 2009 |
| 7589024 |
Process for producing semiconductor integrated circuit device |
Sep. 15, 2009 |
| 7585773 |
Non-conformal stress liner for enhanced MOSFET performance |
Sep. 8, 2009 |
| 7585734 |
Method of fabricating multi-gate transistor and multi-gate transistor fabricated thereby |
Sep. 8, 2009 |
| 7579280 |
Method of patterning a film |
Aug. 25, 2009 |
| 7572733 |
Gas switching during an etch process to modulate the characteristics of the etch |
Aug. 11, 2009 |
| 7557042 |
Method for making a semiconductor device with reduced spacing |
Jul. 7, 2009 |
| 7553769 |
Method for treating a dielectric film |
Jun. 30, 2009 |
| 7544617 |
Die scale control of chemical mechanical polishing |
Jun. 9, 2009 |
| 7541291 |
Reduction of feature critical dimensions |
Jun. 2, 2009 |
| 7541288 |
Methods of forming integrated circuit structures using insulator deposition and insulator gap filling techniques |
Jun. 2, 2009 |
| 7521322 |
Vertical transistors |
Apr. 21, 2009 |
| 7517806 |
Integrated circuit having pairs of parallel complementary FinFETs |
Apr. 14, 2009 |
| 7510967 |
Method for manufacturing semiconductor device |
Mar. 31, 2009 |
| 7510919 |
Anchoring, by lateral oxidizing, of patterns of a thin film to prevent the dewetting phenomenon |
Mar. 31, 2009 |
| 7507669 |
Gap tuning for surface micromachined structures in an epitaxial reactor |
Mar. 24, 2009 |
| 7507674 |
Memory device including resistance change layer as storage node and method(s) for making the same |
Mar. 24, 2009 |
| 7504339 |
Method to form shallow trench isolation with rounded upper corner for advanced semiconductor circuits |
Mar. 17, 2009 |
| 7491647 |
Etch with striation control |
Feb. 17, 2009 |
| 7488687 |
Methods of forming electrical interconnect structures using polymer residues to increase etching selectivity through dielectric layers |
Feb. 10, 2009 |
| 7485579 |
Method of manufacturing a semiconductor device |
Feb. 3, 2009 |
| 7481943 |
Method suitable for etching hydrophillic trenches in a substrate |
Jan. 27, 2009 |
| 7476329 |
Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices |
Jan. 13, 2009 |
| 7462504 |
Surface-emitting type light-emitting diode and fabrication method thereof |
Dec. 9, 2008 |
| 7455893 |
Staggered in-situ deposition and etching of a dielectric layer for HDP-CVD |
Nov. 25, 2008 |
| 7439143 |
Flash memory device and method of manufacturing the same |
Oct. 21, 2008 |
| 7435536 |
Method to align mask patterns |
Oct. 14, 2008 |
| 7435683 |
Apparatus and method for selectively recessing spacers on multi-gate devices |
Oct. 14, 2008 |
| 7432120 |
Method for realizing a hosting structure of nanometric elements |
Oct. 7, 2008 |
| 7432172 |
Plasma etching method |
Oct. 7, 2008 |
| 7427568 |
Method of forming an interconnect structure |
Sep. 23, 2008 |
| 7425277 |
Method for hard mask CD trim |
Sep. 16, 2008 |
| 7413987 |
Method for manufacturing a semiconductor device |
Aug. 19, 2008 |
| 7407890 |
Patterning sub-lithographic features with variable widths |
Aug. 5, 2008 |
| 7387927 |
Reducing oxidation under a high K gate dielectric |
Jun. 17, 2008 |
| 7381638 |
Fabrication technique using sputter etch and vacuum transfer |
Jun. 3, 2008 |
| 7381943 |
Neutral particle beam processing apparatus |
Jun. 3, 2008 |
| 7368385 |
Method for producing a structure on the surface of a substrate |
May. 6, 2008 |
| 7354523 |
Methods for sidewall etching and etching during filling of a trench |
Apr. 8, 2008 |
| 7332439 |
Metal gate transistors with epitaxial source and drain regions |
Feb. 19, 2008 |
| 7326651 |
Method for forming damascene structure utilizing planarizing material coupled with compressive diffusion barrier material |
Feb. 5, 2008 |
| 7311850 |
Method of forming patterned thin film and method of fabricating micro device |
Dec. 25, 2007 |
| 7294580 |
Method for plasma stripping using periodic modulation of gas chemistry and hydrocarbon addition |
Nov. 13, 2007 |
| 7291563 |
Method of etching a substrate; method of forming a feature on a substrate; and method of depositing a layer comprising silicon, carbon, and fluorine onto a semiconductor substrate |
Nov. 6, 2007 |
| 7282450 |
Sidewall coverage for copper damascene filling |
Oct. 16, 2007 |
| 7276447 |
Plasma dielectric etch process including ex-situ backside polymer removal for low-dielectric constant material |
Oct. 2, 2007 |
| 7259098 |
Methods for fabricating semiconductor devices |
Aug. 21, 2007 |
| 7250371 |
Reduction of feature critical dimensions |
Jul. 31, 2007 |
| 7238619 |
Method for eliminating bridging defect in via first dual damascene process |
Jul. 3, 2007 |
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