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Class Information
Number: 438/695
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with coating step > Simultaneous etching and coating
Description: Processes wherein the chemical etching and material deposition occur concurrently.


Patents under this class:
1 2 3 4 5 6 7 8

Patent Number Title Of Patent Date Issued
6449521 Decontamination of a plasma reactor using a plasma after a chamber clean Sep. 10, 2002
6423653 Reduction of plasma damage for HDP-CVD PSG process Jul. 23, 2002
6423648 Controllable oxidation technique for the formation of high-quality ultra-thin gate oxide using carbon dioxide as the oxidizing agent Jul. 23, 2002
6416933 Method to produce small space pattern using plasma polymerization layer Jul. 9, 2002
6413866 Method of forming a solute-enriched layer in a substrate surface and article formed thereby Jul. 2, 2002
6410383 Method of forming conducting diffusion barriers Jun. 25, 2002
6410437 Method for etching dual damascene structures in organosilicate glass Jun. 25, 2002
6410445 Manufacturing method for integrated sensor arrays Jun. 25, 2002
6410446 Method for gap filling Jun. 25, 2002
6410452 Method of manufacturing semiconductor device Jun. 25, 2002
6395643 Gas manifold for uniform gas distribution and photochemistry May. 28, 2002
6368974 Shrinking equal effect critical dimension of mask by in situ polymer deposition and etching Apr. 9, 2002
6365529 Method for patterning dual damascene interconnects using a sacrificial light absorbing material Apr. 2, 2002
6365015 Method for depositing high density plasma chemical vapor deposition oxide in high aspect ratio gaps Apr. 2, 2002
6326298 Substantially planar semiconductor topography using dielectrics and chemical mechanical polish Dec. 4, 2001
6323124 Resputtering to achieve better step coverage Nov. 27, 2001
6319835 Stripping method Nov. 20, 2001
6319861 Method of improving deposition Nov. 20, 2001
6294102 Selective dry etch of a dielectric film Sep. 25, 2001
6287977 Method and apparatus for forming improved metal interconnects Sep. 11, 2001
6274493 Method for forming a via Aug. 14, 2001
6271141 Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines Aug. 7, 2001
6271138 Chemical mechanical polish (CMP) planarizing method with enhanced chemical mechanical polish (CMP) planarized layer planarity Aug. 7, 2001
6268288 Plasma treated thermal CVD of TaN films from tantalum halide precursors Jul. 31, 2001
6261951 Plasma treatment to enhance inorganic dielectric adhesion to copper Jul. 17, 2001
6255177 Method for fabricating a salicide gate Jul. 3, 2001
6251000 Substrate holder, method for polishing substrate, and method for fabricating semiconductor device Jun. 26, 2001
6242356 Etchback method for forming microelectronic layer with enhanced surface smoothness Jun. 5, 2001
6238936 Method of using critical dimension mapping to qualify a new integrated circuit fabrication etch process May. 29, 2001
6235637 Method for marking a wafer without inducing flat edge particle problem May. 22, 2001
6235638 Simplified etching technique for producing multiple undercut profiles May. 22, 2001
6232216 Thin film forming method May. 15, 2001
6227211 Uniformity improvement of high aspect ratio contact by stop layer May. 8, 2001
6225228 Silicon oxide co-deposition/etching process May. 1, 2001
6214736 Silicon processing method Apr. 10, 2001
6211040 Two-step, low argon, HDP CVD oxide deposition process Apr. 3, 2001
6203863 Method of gap filling Mar. 20, 2001
6204184 Method of manufacturing semiconductor devices Mar. 20, 2001
6200900 Method for formation of an air gap in an integrated circuit architecture Mar. 13, 2001
6183940 Method of retaining the integrity of a photoresist pattern Feb. 6, 2001
6184158 Inductively coupled plasma CVD Feb. 6, 2001
6174813 Dual damascene manufacturing process Jan. 16, 2001
6171922 SiCr thin film resistors having improved temperature coefficients of resistance and sheet resistance Jan. 9, 2001
6171962 Shallow trench isolation formation without planarization mask Jan. 9, 2001
6171963 Method for forming a planar intermetal dielectric using a barrier layer Jan. 9, 2001
6171965 Treatment method of cleaved film for the manufacture of substrates Jan. 9, 2001
6171964 Method of forming a conductive spacer in a via Jan. 9, 2001
6169035 Method of local oxidation using etchant and oxidizer Jan. 2, 2001
6156663 Method and apparatus for plasma processing Dec. 5, 2000
6150285 Method for simultaneous deposition and sputtering of TEOS Nov. 21, 2000

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