| |
 |
|
Class Information
Number: 438/692
Name: Semiconductor device manufacturing: process > Chemical etching > Combined with the removal of material by nonchemical means (e.g., ablating, abrading, etc.) > Combined mechanical and chemical material removal > Simultaneous (e.g., chemical-mechanical polishing, etc.)
Description: Processes wherein the chemical and mechanical material removal processes are concurrent.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6576553 |
Chemical mechanical planarization of conductive material |
Jun. 10, 2003 |
| 6576558 |
High aspect ratio shallow trench using silicon implanted oxide |
Jun. 10, 2003 |
| 6573174 |
Method for reducing surface defects of semiconductor substrates |
Jun. 3, 2003 |
| 6573187 |
Method of forming dual damascene structure |
Jun. 3, 2003 |
| 6568996 |
Polishing agent for processing semiconductor, dispersant used therefor and process for preparing semiconductor device using above polishing agent for processing semiconductor |
May. 27, 2003 |
| 6569215 |
Composition for polishing magnetic disk substrate |
May. 27, 2003 |
| 6569216 |
Abrasive fluid compositions |
May. 27, 2003 |
| 6569343 |
Method for producing liquid discharge head, liquid discharge head, head cartridge, liquid discharging recording apparatus, method for producing silicon plate and silicon plate |
May. 27, 2003 |
| 6569690 |
Monitoring system for determining progress in a fabrication activity |
May. 27, 2003 |
| 6569747 |
Methods for trench isolation with reduced step height |
May. 27, 2003 |
| 6569769 |
Slurry-less chemical-mechanical polishing |
May. 27, 2003 |
| 6569770 |
Method for improving oxide erosion of tungsten CMP operations |
May. 27, 2003 |
| 6569771 |
Carrier head for chemical mechanical polishing |
May. 27, 2003 |
| 6569777 |
Plasma etching method to form dual damascene with improved via profile |
May. 27, 2003 |
| 6565619 |
Polishing composition and polishing method employing it |
May. 20, 2003 |
| 6566148 |
Method of making a ferroelectric memory transistor |
May. 20, 2003 |
| 6566249 |
Planarized semiconductor interconnect topography and method for polishing a metal layer to form wide interconnect structures |
May. 20, 2003 |
| 6566258 |
Bi-layer etch stop for inter-level via |
May. 20, 2003 |
| 6566266 |
Method of polishing a layer comprising copper using an oxide inhibitor slurry |
May. 20, 2003 |
| 6566267 |
Inexpensive process for producing a multiplicity of semiconductor wafers |
May. 20, 2003 |
| 6566268 |
Method and apparatus for planarizing a wafer surface of a semiconductor wafer having an elevated portion extending therefrom |
May. 20, 2003 |
| 6562184 |
Planarization system with multiple polishing pads |
May. 13, 2003 |
| 6562691 |
Method for forming protrusive alignment-mark |
May. 13, 2003 |
| 6562712 |
Multi-step planarizing method for forming a patterned thermally extrudable material layer |
May. 13, 2003 |
| 6562725 |
Dual damascene structure employing nitrogenated silicon carbide and non-nitrogenated silicon carbide etch stop layers |
May. 13, 2003 |
| 6564116 |
Method for determining efficiently parameters in chemical-mechanical polishing (CMP) |
May. 13, 2003 |
| 6558562 |
Work piece wand and method for processing work pieces using a work piece handling wand |
May. 6, 2003 |
| 6558570 |
Polishing slurry and method for chemical-mechanical polishing |
May. 6, 2003 |
| 6559033 |
Processing for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal lines |
May. 6, 2003 |
| 6559040 |
Process for polishing the top surface of a polysilicon gate |
May. 6, 2003 |
| 6559055 |
Dummy structures that protect circuit elements during polishing |
May. 6, 2003 |
| 6554896 |
Epitaxial growth substrate and a method for producing the same |
Apr. 29, 2003 |
| 6555474 |
Method of forming a protective layer included in metal filled semiconductor features |
Apr. 29, 2003 |
| 6555476 |
Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric |
Apr. 29, 2003 |
| 6555477 |
Method for preventing Cu CMP corrosion |
Apr. 29, 2003 |
| 6555916 |
Integrated circuit prepared by selectively cleaning copper substrates, in-situ, to remove copper oxides |
Apr. 29, 2003 |
| 6551921 |
Method of polishing a stack of dielectric layers including a fluorine containing silicon oxide layer |
Apr. 22, 2003 |
| 6551933 |
Abrasive finishing with lubricant and tracking |
Apr. 22, 2003 |
| 6551934 |
Process for fabricating semiconductor device and apparatus for fabricating semiconductor device |
Apr. 22, 2003 |
| 6551972 |
Solutions for cleaning silicon semiconductors or silicon oxides |
Apr. 22, 2003 |
| 6552360 |
Method and circuit layout for reducing post chemical mechanical polishing defect count |
Apr. 22, 2003 |
| 6546939 |
Post clean treatment |
Apr. 15, 2003 |
| 6547843 |
LSI device polishing composition and method for producing LSI device |
Apr. 15, 2003 |
| 6548388 |
Semiconductor device including gate electrode having damascene structure and method of fabricating the same |
Apr. 15, 2003 |
| 6548399 |
Method of forming a semiconductor device using a carbon doped oxide layer to control the chemical mechanical polishing of a dielectric layer |
Apr. 15, 2003 |
| 6548407 |
Method and apparatus for controlling chemical interactions during planarization of microelectronic substrates |
Apr. 15, 2003 |
| 6548408 |
METHOD OF MINIMIZING REPETITIVE CHEMICAL-MECHANICAL POLISHING SCRATCH MARKS, METHOD OF PROCESSING A SEMICONDUCTOR WAFER OUTER SURFACE, METHOD OF MINIMIZING UNDESIRED NODE-TO-NODE SHORTS OF A L |
Apr. 15, 2003 |
| 6548409 |
Method of reducing micro-scratches during tungsten CMP |
Apr. 15, 2003 |
| 6544435 |
Composition and method of formation and use therefor in chemical-mechanical polishing |
Apr. 8, 2003 |
| 6544891 |
Method to eliminate post-CMP copper flake defect |
Apr. 8, 2003 |
|
|
|
