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Class Information
Number: 438/675
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Selective deposition of conductive layer > Plug formation (i.e., in viahole)
Description: Processes wherein the selective deposition results in the deposited conductive material being recessed below the top surface of the substrate.










Patents under this class:

Patent Number Title Of Patent Date Issued
8710648 Wafer level packaging structure with large contact area and preparation method thereof Apr. 29, 2014
8704284 Semiconductor device having bit line expanding islands Apr. 22, 2014
8703602 Selective seed layer treatment for feature plating Apr. 22, 2014
8692381 Integrated circuits with a resistance to single event upset occurrence and methods for providing the same Apr. 8, 2014
8692229 Replacement contacts for all-around contacts Apr. 8, 2014
8691690 Contact formation method incorporating preventative etch step reducing interlayer dielectric material flake defects Apr. 8, 2014
8691689 Methods for fabricating integrated circuits having low resistance device contacts Apr. 8, 2014
8691687 Superfilled metal contact vias for semiconductor devices Apr. 8, 2014
8686568 Semiconductor package substrates having layered circuit segments, and related methods Apr. 1, 2014
8679975 Method for forming trenches in a semiconductor component Mar. 25, 2014
8679974 Method for fabricating interconnecting lines inside via holes of semiconductor device Mar. 25, 2014
8673767 Manufacturing method for semiconductor device Mar. 18, 2014
8673766 Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless Mar. 18, 2014
8673741 Etching a laser-cut semiconductor before dicing a die attach film (DAF) or other material layer Mar. 18, 2014
8673740 Method for formation of an electrically conducting through via Mar. 18, 2014
8673659 Method of fabricating semiconductor device including process monitoring pattern having overlapping input/output pad array area Mar. 18, 2014
8669183 Manufacturing method of semiconductor device Mar. 11, 2014
8664117 Method for manufacturing semiconductor device using anisotropic etching Mar. 4, 2014
8652966 Semiconductor device manufacturing method and semiconductor device Feb. 18, 2014
8647981 Methods of forming patterns, and methods of forming integrated circuitry Feb. 11, 2014
8642470 Semiconductor device manufacturing method Feb. 4, 2014
8637995 Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate Jan. 28, 2014
8637962 Semiconductor dice including at least one blind hole, wafers including such semiconductor dice, and intermediate products made while forming at least one blind hole in a substrate Jan. 28, 2014
8637908 Borderless contacts in semiconductor devices Jan. 28, 2014
8637401 Methods and devices for high accuracy deposition on a continuously moving substrate Jan. 28, 2014
8637397 Method for manufacturing a through hole electrode substrate Jan. 28, 2014
8633109 Soft error rate (SER) reduction in advanced silicon processes Jan. 21, 2014
8629437 Semiconductor device and manufacturing method thereof Jan. 14, 2014
8629058 Methods for via structure with improved reliability Jan. 14, 2014
8623761 Method of forming a graphene cap for copper interconnect structures Jan. 7, 2014
8614140 Semiconductor device manufacturing apparatus Dec. 24, 2013
8609535 Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same Dec. 17, 2013
8604604 Conductive interconnects Dec. 10, 2013
8604555 Semiconductor structure and manufacturing method of the same Dec. 10, 2013
8586476 Fabrication method for circuit substrate having post-fed die side power supply connections Nov. 19, 2013
8586472 Conductive lines and pads and method of manufacturing thereof Nov. 19, 2013
8575026 Method of protecting sidewall surfaces of a semiconductor substrate Nov. 5, 2013
8563416 Coaxial solder bump support structure Oct. 22, 2013
8557701 Method for fabricating a semiconductor device with formation of conductive lines Oct. 15, 2013
8557664 Methods of fabricating semiconductor devices Oct. 15, 2013
8552565 Chip package and method for forming the same Oct. 8, 2013
8551880 Ammonia-based plasma treatment for metal fill in narrow features Oct. 8, 2013
8546258 Method of fabricating metal contact using double patterning technology and device formed thereby Oct. 1, 2013
8546241 Semiconductor device with stress trench isolation and method for forming the same Oct. 1, 2013
8541879 Super-self-aligned contacts and method for making the same Sep. 24, 2013
8530352 Methods of patterning a material Sep. 10, 2013
8530277 Integrated circuit packaging system with package on package support and method of manufacture thereof Sep. 10, 2013
8524615 Method of forming hardened porous dielectric layer and method of fabricating semiconductor device having hardened porous dielectric layer Sep. 3, 2013
8524602 Method for forming vias in a substrate Sep. 3, 2013
8524560 Method of fabricating semiconductor device with vertical channel transistor Sep. 3, 2013











 
 
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