Resources Contact Us Home
Browse by Category: Main > Engineering
Class Information
Number: 438/672
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > And patterning of conductive layer > Plug formation (i.e., in viahole)
Description: Processes wherein the patterning step results in the remaining conductive material being recessed below the top surface of the substrate.

Patents under this class:

Patent Number Title Of Patent Date Issued
7618892 Via hole forming method Nov. 17, 2009
7615486 Apparatus and method for integrated surface treatment and deposition for copper interconnect Nov. 10, 2009
7615484 Integrated circuit manufacturing method using hard mask Nov. 10, 2009
7611986 Dual damascene patterning method Nov. 3, 2009
7608905 Independently addressable interdigitated nanowires Oct. 27, 2009
7608537 Method for fabricating semiconductor device Oct. 27, 2009
7605081 Sub-lithographic feature patterning using self-aligned self-assembly polymers Oct. 20, 2009
7605035 Method of fabricating semiconductor device by exposing upper sidewalls of contact plug to form charge storage electrode Oct. 20, 2009
7601624 Device comprising an ohmic via contact, and method of fabricating thereof Oct. 13, 2009
7598171 Method of manufacturing a semiconductor device Oct. 6, 2009
7598165 Methods for forming a multiplexer of a memory device Oct. 6, 2009
7595556 Semiconductor device and method for manufacturing the same Sep. 29, 2009
7595267 Method of forming contact hole of semiconductor device Sep. 29, 2009
7592703 RF and MMIC stackable micro-modules Sep. 22, 2009
7592258 Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same Sep. 22, 2009
7592253 Method for forming a damascene pattern of a copper metallization layer Sep. 22, 2009
7592247 Sub-lithographic local interconnects, and methods for forming same Sep. 22, 2009
7589021 Copper metal interconnection with a local barrier metal layer Sep. 15, 2009
7585757 Semiconductor device and method of manufacturing the same Sep. 8, 2009
7585710 Methods of forming electronic devices having partially elevated source/drain structures Sep. 8, 2009
7582561 Method of selectively depositing materials on a substrate using a supercritical fluid Sep. 1, 2009
7579622 Fabrication of MEMS devices with spin-on glass Aug. 25, 2009
7572717 Method of manufacturing semiconductor device Aug. 11, 2009
7569453 Contact structure Aug. 4, 2009
7569404 Ink-jet printhead fabrication Aug. 4, 2009
7566658 Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device Jul. 28, 2009
7563704 Method of forming an interconnect including a dielectric cap having a tensile stress Jul. 21, 2009
7560016 Selectively accelerated plating of metal features Jul. 14, 2009
7557039 Method for fabricating contact hole of semiconductor device Jul. 7, 2009
7557038 Method for fabricating self-aligned contact hole Jul. 7, 2009
7557029 Semiconductor device and fabrication process thereof Jul. 7, 2009
7553764 Silicon wafer having through-wafer vias Jun. 30, 2009
7553763 Salicide process utilizing a cluster ion implantation process Jun. 30, 2009
7547628 Method for manufacturing capacitor Jun. 16, 2009
7545045 Dummy via for reducing proximity effect and method of using the same Jun. 9, 2009
7544569 Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing Jun. 9, 2009
7541276 Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer Jun. 2, 2009
7537959 Chip stack package and manufacturing method thereof May. 26, 2009
7534725 Advanced process control for semiconductor processing May. 19, 2009
7527993 Method and structure for fabricating smooth mirrors for liquid crystal on silicon devices May. 5, 2009
7524758 Interconnect structure and method for semiconductor device Apr. 28, 2009
7521359 Interconnect structure encased with high and low k interlevel dielectrics Apr. 21, 2009
7521357 Methods of forming metal wiring in semiconductor devices using etch stop layers Apr. 21, 2009
7521348 Method of fabricating semiconductor device having fine contact holes Apr. 21, 2009
7517796 Method for patterning submicron pillars Apr. 14, 2009
7514362 Integrated circuit including sub-lithographic structures Apr. 7, 2009
7510970 Process for manufacturing semiconductor integrated circuit device Mar. 31, 2009
7510967 Method for manufacturing semiconductor device Mar. 31, 2009
7510965 Method for fabricating a dual damascene structure Mar. 31, 2009
7510963 Semiconductor device having multilayer interconnection structure and manufacturing method thereof Mar. 31, 2009

  Recently Added Patents
Integrated circuit having a discrete capacitor mounted on a semiconductor die
Bus controller for handling split transactions
Opioid-nornicotine codrugs combinations for pain management
Modified and stabilized GDF propeptides and uses thereof
Automatic adjustment of devices in a home entertainment system
Charge pump and method of biasing deep N-well in charge pump
Anti-reductive high-frequency ceramic dielectric material sintered at low temperature and matched with copper internal electrode
  Randomly Featured Patents
Recording informatioin on an optical disc without using pre-manufactured tracks
Voter circuit including averaging means
Storage device for a garden hose in the shape of a frog
Electrostatic discharge protection device
Scanner housing structure
Biologically active B-chain homodimers
Dry edible film coating composition, method and coating form
Flash memory distribution of digital content
Switchless D.C. multifunction tester
Method for selective area growth by liquid phase epitaxy