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Class Information
Number: 438/672
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > And patterning of conductive layer > Plug formation (i.e., in viahole)
Description: Processes wherein the patterning step results in the remaining conductive material being recessed below the top surface of the substrate.










Patents under this class:

Patent Number Title Of Patent Date Issued
8530309 Memory device and method for fabricating the same Sep. 10, 2013
8524602 Method for forming vias in a substrate Sep. 3, 2013
8522430 Clustered stacked vias for reliable electronic substrates Sep. 3, 2013
8519538 Laser etch via formation Aug. 27, 2013
8518824 Self aligning via patterning Aug. 27, 2013
8518823 Through silicon via and method of forming the same Aug. 27, 2013
8518822 Integrated circuit packaging system with multi-stacked flip chips and method of manufacture thereof Aug. 27, 2013
8518820 Methods for forming contacts in semiconductor devices Aug. 27, 2013
8518817 Method of electrolytic plating and semiconductor device fabrication Aug. 27, 2013
8513115 Method of forming an interconnect structure having an enlarged region Aug. 20, 2013
8513108 Apparatus, system, and method for wireless connection in integrated circuit packages Aug. 20, 2013
8507378 Method and structure for self aligned contact for integrated circuits Aug. 13, 2013
8501620 Method for depositing tungsten film having low resistivity, low roughness and high reflectivity Aug. 6, 2013
8501618 Semiconductor device and method of forming RDL wider than contact pad along first axis and narrower than contact pad along second axis Aug. 6, 2013
8492808 Semiconductor device and manufacturing method thereof Jul. 23, 2013
8486832 Method for fabricating semiconductor device Jul. 16, 2013
8486831 Semiconductor device manufacturing method Jul. 16, 2013
8486830 Via forming method and method of manufacturing multi-chip package using the same Jul. 16, 2013
8486787 Method of fabricating semiconductor device Jul. 16, 2013
8482129 Wafer-level stack package and method of fabricating the same Jul. 9, 2013
8476112 Optimized semiconductor packaging in a three-dimensional stack Jul. 2, 2013
8466062 TSV backside processing using copper damascene interconnect technology Jun. 18, 2013
8456008 Structure and process for the formation of TSVs Jun. 4, 2013
8455359 Semiconductor devices and methods of manufacturing the same Jun. 4, 2013
8455358 Method of manufacturing via hole in a semiconductor device Jun. 4, 2013
8455357 Method of plating through wafer vias in a wafer for 3D packaging Jun. 4, 2013
8450211 Method for fabricating semiconductor device May. 28, 2013
8450200 Method for stacked contact with low aspect ratio May. 28, 2013
8450197 Contact elements of a semiconductor device formed by electroless plating and excess material removal with reduced sheer forces May. 28, 2013
8446016 Chip stack package May. 21, 2013
8446000 Package structure and package process May. 21, 2013
8445382 Side wall pore sealing for low-k dielectrics May. 21, 2013
8440509 Method for producing a semiconductor device by etch back process May. 14, 2013
8435890 Method to alter silicide properties using GCIB treatment May. 7, 2013
8435830 Methods of fabricating semiconductor devices May. 7, 2013
8432035 Metal cap layer with enhanced etch resistivity for copper-based metal regions in semiconductor devices Apr. 30, 2013
8431485 Manufacturing method for a buried circuit structure Apr. 30, 2013
8431446 Via formation for cross-point memory Apr. 30, 2013
8426309 Graphene nanoelectric device fabrication Apr. 23, 2013
8420532 Method of manufacturing semiconductor device Apr. 16, 2013
8415806 Semiconductor structure and method for manufacturing the same Apr. 9, 2013
8415251 Electric component and component and method for the production thereof Apr. 9, 2013
8409986 Method for improving within die uniformity of metal plug chemical mechanical planarization process in gate last route Apr. 2, 2013
8409981 Semiconductor package with a metal post and manufacturing method thereof Apr. 2, 2013
8409962 Manufacturing method of copper interconnection structure with MIM capacitor Apr. 2, 2013
8404588 Method of manufacturing via electrode Mar. 26, 2013
8404586 Manufacturing method for semiconductor device Mar. 26, 2013
8404578 Methods of forming nonvolatile memory devices having electromagnetically shielding source plates Mar. 26, 2013
8404577 Semiconductor device having a grain orientation layer Mar. 26, 2013
8399282 Method for forming pad in wafer with three-dimensional stacking structure Mar. 19, 2013











 
 
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