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Class Information
Number: 438/655
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Plural layered electrode or conductor > Silicide
Description: Processes wherein at least one of the diverse conductive layers is formed by the chemical combination of silicon (Si) with a metal atom.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622386 |
Method for improved formation of nickel silicide contacts in semiconductor devices |
Nov. 24, 2009 |
| 7618891 |
Method for forming self-aligned metal silicide contacts |
Nov. 17, 2009 |
| 7611943 |
Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulation |
Nov. 3, 2009 |
| 7605033 |
Low resistance peripheral local interconnect contacts with selective wet strip of titanium |
Oct. 20, 2009 |
| 7601610 |
Method for manufacturing a high integration density power MOS device |
Oct. 13, 2009 |
| 7589007 |
MESFETs integrated with MOSFETs on common substrate and methods of forming the same |
Sep. 15, 2009 |
| 7585738 |
Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device |
Sep. 8, 2009 |
| 7585767 |
Semiconductor device and method for fabricating the same |
Sep. 8, 2009 |
| 7582535 |
Method of forming MOS transistor having fully silicided metal gate electrode |
Sep. 1, 2009 |
| 7572723 |
Micropad for bonding and a method therefor |
Aug. 11, 2009 |
| 7557040 |
Method of manufacture of semiconductor device |
Jul. 7, 2009 |
| 7553762 |
Method for forming metal silicide layer |
Jun. 30, 2009 |
| 7553729 |
Method of manufacturing non-volatile memory device |
Jun. 30, 2009 |
| 7550356 |
Method of fabricating strained-silicon transistors |
Jun. 23, 2009 |
| 7550372 |
Method of fabricating conductive lines with silicide layer |
Jun. 23, 2009 |
| 7550381 |
Contact clean by remote plasma and repair of silicide surface |
Jun. 23, 2009 |
| 7544553 |
Integration scheme for fully silicided gate |
Jun. 9, 2009 |
| 7544616 |
Methods of forming nitride read only memory and word lines thereof |
Jun. 9, 2009 |
| 7538029 |
Method of room temperature growth of SiO.sub.x on silicide as an etch stop layer for metal contact open of semiconductor devices |
May. 26, 2009 |
| 7537998 |
Method for forming salicide in semiconductor device |
May. 26, 2009 |
| 7538016 |
Signal and/or ground planes with double buried insulator layers and fabrication process |
May. 26, 2009 |
| 7534732 |
Semiconductor devices with copper interconnects and composite silicon nitride capping layers |
May. 19, 2009 |
| 7531459 |
Methods of forming self-aligned silicide layers using multiple thermal processes |
May. 12, 2009 |
| 7528067 |
MOSFET structure with multiple self-aligned silicide contacts |
May. 5, 2009 |
| 7528070 |
Sputtering apparatus and method for forming metal silicide layer using the same |
May. 5, 2009 |
| 7524682 |
Method for monitoring temperature in thermal process |
Apr. 28, 2009 |
| 7510956 |
MOS device with multi-layer gate stack |
Mar. 31, 2009 |
| 7504336 |
Methods for forming CMOS devices with intrinsically stressed metal silicide layers |
Mar. 17, 2009 |
| 7501333 |
Work function adjustment on fully silicided (FUSI) gate |
Mar. 10, 2009 |
| 7495299 |
Semiconductor device |
Feb. 24, 2009 |
| 7494859 |
Semiconductor device having metal gate patterns and related method of manufacture |
Feb. 24, 2009 |
| 7488637 |
CMOS image sensor and method for forming the same |
Feb. 10, 2009 |
| 7485522 |
Method of manufacturing semiconductor device having dual gate electrode |
Feb. 3, 2009 |
| 7485558 |
Method of manufacturing semiconductor device |
Feb. 3, 2009 |
| 7482270 |
Fully and uniformly silicided gate structure and method for forming same |
Jan. 27, 2009 |
| 7479682 |
Structure of a field effect transistor having metallic silicide and manufacturing method thereof |
Jan. 20, 2009 |
| 7476581 |
Method of manufacturing semiconductor device having dual gate electrode |
Jan. 13, 2009 |
| 7465660 |
Graded/stepped silicide process to improve MOS transistor |
Dec. 16, 2008 |
| 7465620 |
Transistor mobility improvement by adjusting stress in shallow trench isolation |
Dec. 16, 2008 |
| 7449410 |
Methods of forming CoSi.sub.2, methods of forming field effect transistors, and methods of forming conductive contacts |
Nov. 11, 2008 |
| 7446062 |
Device having dual etch stop liner and reformed silicide layer and related methods |
Nov. 4, 2008 |
| 7432184 |
Integrated PVD system using designated PVD chambers |
Oct. 7, 2008 |
| 7429770 |
Semiconductor device and manufacturing method thereof |
Sep. 30, 2008 |
| 7419907 |
Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure |
Sep. 2, 2008 |
| 7411254 |
Semiconductor substrate |
Aug. 12, 2008 |
| 7407880 |
Semiconductor device and manufacturing process therefore |
Aug. 5, 2008 |
| 7407882 |
Semiconductor component having a contact structure and method of manufacture |
Aug. 5, 2008 |
| 7405112 |
Low contact resistance CMOS circuits and methods for their fabrication |
Jul. 29, 2008 |
| 7405101 |
CMOS imager with selectively silicided gate |
Jul. 29, 2008 |
| 7399701 |
Semiconductor device manufacturing method including forming a metal silicide layer on an indium-containing layer |
Jul. 15, 2008 |
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