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Class Information
Number: 438/634
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Having planarization step > Utilizing etch-stop layer
Description: Processes wherein the planarization step is conducted utilizing an etch stop layer to limit the extent of a material removal operation.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7602032 |
Memory having cap structure for magnetoresistive junction and method for structuring the same |
Oct. 13, 2009 |
| 7601610 |
Method for manufacturing a high integration density power MOS device |
Oct. 13, 2009 |
| 7557034 |
Semiconductor device and a method of manufacturing the same |
Jul. 7, 2009 |
| 7553758 |
Method of fabricating interconnections of microelectronic device using dual damascene process |
Jun. 30, 2009 |
| 7553759 |
Semiconductor device and method of manufacturing a semiconductor device |
Jun. 30, 2009 |
| 7544617 |
Die scale control of chemical mechanical polishing |
Jun. 9, 2009 |
| 7538025 |
Dual damascene process flow for porous low-k materials |
May. 26, 2009 |
| 7534642 |
Methods of manufacturing an image device |
May. 19, 2009 |
| 7534711 |
System and method for direct etching |
May. 19, 2009 |
| 7531448 |
Manufacturing method of dual damascene structure |
May. 12, 2009 |
| 7524752 |
Method of manufacturing semiconductor device |
Apr. 28, 2009 |
| 7524757 |
Method for manufacturing multi-level transistor comprising forming selective epitaxial growth layer |
Apr. 28, 2009 |
| 7521357 |
Methods of forming metal wiring in semiconductor devices using etch stop layers |
Apr. 21, 2009 |
| 7521348 |
Method of fabricating semiconductor device having fine contact holes |
Apr. 21, 2009 |
| 7507657 |
Method for fabricating storage node contact in semiconductor device |
Mar. 24, 2009 |
| 7504287 |
Methods for fabricating an integrated circuit |
Mar. 17, 2009 |
| 7476612 |
Method for manufacturing semiconductor device |
Jan. 13, 2009 |
| 7459396 |
Method for thin film deposition using multi-tray film precursor evaporation system |
Dec. 2, 2008 |
| 7435682 |
Method of manufacturing semiconductor device |
Oct. 14, 2008 |
| 7364924 |
Silicon phosphor electroluminescence device with nanotip electrode |
Apr. 29, 2008 |
| 7361587 |
Semiconductor contact and nitride spacer formation system and method |
Apr. 22, 2008 |
| 7361605 |
System and method for removal of photoresist and residues following contact etch with a stop layer present |
Apr. 22, 2008 |
| 7354855 |
Semiconductor device and a method of manufacturing the same |
Apr. 8, 2008 |
| 7351635 |
Method of fabricating microelectronic device using super critical fluid |
Apr. 1, 2008 |
| 7341937 |
Semiconductor device and method of manufacturing same |
Mar. 11, 2008 |
| 7335598 |
Chemical-mechanical polishing method |
Feb. 26, 2008 |
| 7335584 |
Method of using SACVD deposition and corresponding deposition reactor |
Feb. 26, 2008 |
| 7326645 |
Methods for forming copper interconnect of semiconductor devices |
Feb. 5, 2008 |
| 7300840 |
MIM capacitor structure and fabricating method thereof |
Nov. 27, 2007 |
| 7291553 |
Method for forming dual damascene with improved etch profiles |
Nov. 6, 2007 |
| 7288476 |
Controlled dry etch of a film |
Oct. 30, 2007 |
| 7282447 |
Method for an integrated circuit contact |
Oct. 16, 2007 |
| 7279410 |
Method for forming inlaid structures for IC interconnections |
Oct. 9, 2007 |
| 7271087 |
Dual damascene interconnection in semiconductor device and method for forming the same |
Sep. 18, 2007 |
| 7262120 |
Method for fabricating metal line in semiconductor device |
Aug. 28, 2007 |
| 7256502 |
Metal interconnections for semiconductor devices including a buffer layer on a trench sidewall |
Aug. 14, 2007 |
| 7253097 |
Integrated circuit system using dual damascene process |
Aug. 7, 2007 |
| 7235478 |
Polymer spacer formation |
Jun. 26, 2007 |
| 7229911 |
Adhesion improvement for low k dielectrics to conductive materials |
Jun. 12, 2007 |
| 7223685 |
Damascene fabrication with electrochemical layer removal |
May. 29, 2007 |
| 7214609 |
Methods for forming single damascene via or trench cavities and for forming dual damascene via cavities |
May. 8, 2007 |
| 7202157 |
Method for forming metallic interconnects in semiconductor devices |
Apr. 10, 2007 |
| 7183195 |
Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler |
Feb. 27, 2007 |
| 7179732 |
Interconnection structure and fabrication method thereof |
Feb. 20, 2007 |
| 7176122 |
Dielectric with sidewall passivating layer |
Feb. 13, 2007 |
| 7172960 |
Multi-layer film stack for extinction of substrate reflections during patterning |
Feb. 6, 2007 |
| 7172908 |
Magnetic memory cells and manufacturing methods |
Feb. 6, 2007 |
| 7163890 |
Methods of fabricating semiconductor device having slope at lower sides of interconnection hole with etch-stop layer |
Jan. 16, 2007 |
| 7163881 |
Method for forming CMOS structure with void-free dielectric film |
Jan. 16, 2007 |
| 7157366 |
Method of forming metal interconnection layer of semiconductor device |
Jan. 2, 2007 |
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