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Class Information
Number: 438/633
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Having planarization step > Simultaneously by chemical and mechanical means
Description: Processes wherein the planarization step is conducted by the simultaneous chemical and mechanical material removal.

Patents under this class:
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Patent Number Title Of Patent Date Issued
6858531 Electro chemical mechanical polishing method Feb. 22, 2005
6858441 MRAM MTJ stack to conductive line alignment method Feb. 22, 2005
6858527 Method to increase electromigration resistance of copper using self-assembled organic thiolate monolayers Feb. 22, 2005
6855607 Multi-step chemical mechanical polishing of a gate area in a FinFET Feb. 15, 2005
6849293 Method to minimize iso-dense contact or via gap filling variation of polymeric materials in the spin coat process Feb. 1, 2005
6846740 Wafer-level quasi-planarization and passivation for multi-height structures Jan. 25, 2005
6841470 Removal of residue from a substrate Jan. 11, 2005
6841466 Method of selectively making copper using plating technology Jan. 11, 2005
6841473 Manufacturing an integrated circuit with low solubility metal-conductor interconnect cap Jan. 11, 2005
6838371 Method of manufacturing semiconductor device Jan. 4, 2005
6835650 ESD/EOS protection structure for integrated circuit devices and methods of fabricating the same Dec. 28, 2004
6833318 Gap-filling process Dec. 21, 2004
6833323 Method for forming patterned features at a semiconductor wafer periphery to prevent metal peeling Dec. 21, 2004
6831005 Electron beam process during damascene processing Dec. 14, 2004
6828226 Removal of SiON residue after CMP Dec. 7, 2004
6825561 Structure and method for eliminating time dependent dielectric breakdown failure of low-k material Nov. 30, 2004
6821881 Method for chemical mechanical polishing of semiconductor substrates Nov. 23, 2004
6818550 Method of cutting a wafer into individual chips Nov. 16, 2004
6815336 Planarization of copper damascene using reverse current electroplating and chemical mechanical polishing Nov. 9, 2004
6815329 Multilayer interconnect structure containing air gaps and method for making Nov. 9, 2004
6815333 Tri-layer masking architecture for patterning dual damascene interconnects Nov. 9, 2004
6812544 Integrated circuit having oversized components Nov. 2, 2004
6806184 Method to eliminate copper hillocks and to reduce copper stress Oct. 19, 2004
6800546 Film forming method by radiating a plasma on a surface of a low dielectric constant film Oct. 5, 2004
6797643 Plasma enhanced CVD low k carbon-doped silicon oxide film deposition using VHF-RF power Sep. 28, 2004
6794286 Process for fabricating a metal wiring and metal contact in a semicondutor device Sep. 21, 2004
6794285 Slurry for CMP, and method of manufacturing semiconductor device Sep. 21, 2004
6790768 Methods and apparatus for polishing substrates comprising conductive and dielectric materials with reduced topographical defects Sep. 14, 2004
6790769 CMP slurry and method of manufacturing semiconductor device Sep. 14, 2004
6787473 Post-planarization clean-up Sep. 7, 2004
6784093 Copper surface passivation during semiconductor manufacturing Aug. 31, 2004
6782512 Fabrication method for a semiconductor device with dummy patterns Aug. 24, 2004
6777323 Lamination structure with copper wiring and its manufacture method Aug. 17, 2004
6774660 Evaluating pattern for measuring an erosion of a semiconductor wafer polished by a chemical mechanical polishing Aug. 10, 2004
6774489 Dielectric layer liner for an integrated circuit structure Aug. 10, 2004
6774042 Planarization method for deep sub micron shallow trench isolation process Aug. 10, 2004
6774039 Process scheme for improving electroplating performance in integrated circuit manufacture Aug. 10, 2004
6770557 Semiconductor device and method of fabricating the same Aug. 3, 2004
6767824 Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask Jul. 27, 2004
6767825 Etching process for forming damascene structure of the semiconductor Jul. 27, 2004
6759322 Method for forming wiring structure Jul. 6, 2004
6759325 Sealing porous structures Jul. 6, 2004
6756297 Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer Jun. 29, 2004
6756309 Feed forward process control method for adjusting metal line Rs Jun. 29, 2004
6746958 Method of controlling the duration of an endpoint polishing process in a multistage polishing process Jun. 8, 2004
6746888 Display and fabricating method thereof Jun. 8, 2004
6746951 Bond pad of semiconductor device and method of fabricating the same Jun. 8, 2004
6743268 Chemical-mechanical planarization of barriers or liners for copper metallurgy Jun. 1, 2004
6740580 Method to form copper interconnects by adding an aluminum layer to the copper diffusion barrier May. 25, 2004
6740573 Method for forming an integrated circuit interconnect using a dual poly process May. 25, 2004

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