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Class Information
Number: 438/631
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Having planarization step
Description: Processes wherein at least one of the metallization levels or at least one separating insulating layer is leveled into a single plane at any stage in the process.


Sub-classes under this class:

Class Number Class Name Patents
438/633 Simultaneously by chemical and mechanical means 813
438/634 Utilizing etch-stop layer 458
438/632 Utilizing reflow 189


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14

Patent Number Title Of Patent Date Issued
7625816 Method of fabricating passivation Dec. 1, 2009
7611985 Formation of holes in substrates using dewetting coatings Nov. 3, 2009
7582556 Circuitry component and method for forming the same Sep. 1, 2009
7579271 Method for forming low dielectric constant fluorine-doped layers Aug. 25, 2009
7575997 Method for forming contact hole of semiconductor device Aug. 18, 2009
7575995 Method of forming fine metal pattern and method of forming metal line using the same Aug. 18, 2009
7560375 Gas dielectric structure forming methods Jul. 14, 2009
7550310 Techniques and systems for analyte detection Jun. 23, 2009
7544606 Method to implement stress free polishing Jun. 9, 2009
7534719 Method for reduction in metal dishing after CMP May. 19, 2009
7528066 Structure and method for metal integration May. 5, 2009
7528064 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads May. 5, 2009
7524697 Method for manufactuing a semiconductor integrated circuit device Apr. 28, 2009
7524757 Method for manufacturing multi-level transistor comprising forming selective epitaxial growth layer Apr. 28, 2009
7510972 Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device Mar. 31, 2009
7510959 Method of manufacturing a semiconductor device having damascene structures with air gaps Mar. 31, 2009
7507647 Method of manufacturing a high voltage semiconductor device including a deep well and a gate oxide layer simultaneously Mar. 24, 2009
7504287 Methods for fabricating an integrated circuit Mar. 17, 2009
7488637 CMOS image sensor and method for forming the same Feb. 10, 2009
7476612 Method for manufacturing semiconductor device Jan. 13, 2009
7470619 Interconnect with high aspect ratio plugged vias Dec. 30, 2008
7446033 Method of forming a metal interconnection of a semiconductor device, and metal interconnection formed by such method Nov. 4, 2008
7425501 Semiconductor structure implementing sacrificial material and methods for making and implementing the same Sep. 16, 2008
7416985 Semiconductor device having a multilayer interconnection structure and fabrication method thereof Aug. 26, 2008
7407879 Chemical planarization performance for copper/low-k interconnect structures Aug. 5, 2008
7405152 Reducing wire erosion during damascene processing Jul. 29, 2008
7405154 Structure and method of forming electrodeposited contacts Jul. 29, 2008
7399699 On-die reflectance arrangements Jul. 15, 2008
7399696 Method for high performance inductor fabrication using a triple damascene process with copper BEOL Jul. 15, 2008
7399671 Disposable pillars for contact formation Jul. 15, 2008
7399649 Semiconductor light-emitting device and fabrication method thereof Jul. 15, 2008
7396768 Copper damascene chemical mechanical polishing (CMP) for thin film head writer fabrication Jul. 8, 2008
7387963 Semiconductor wafer and process for producing a semiconductor wafer Jun. 17, 2008
7384865 Semiconductor device with a metal line and method of forming the same Jun. 10, 2008
7382054 Method for forming self-aligned contacts and local interconnects simultaneously Jun. 3, 2008
7381638 Fabrication technique using sputter etch and vacuum transfer Jun. 3, 2008
7375023 Method and apparatus for chemical mechanical polishing of semiconductor substrates May. 20, 2008
7348272 Method of fabricating interconnect Mar. 25, 2008
7338907 Selective etching processes of silicon nitride and indium oxide thin films for FeRAM device applications Mar. 4, 2008
7316971 Wire bond pads Jan. 8, 2008
7317253 Cobalt tungsten phosphate used to fill voids arising in a copper metallization process Jan. 8, 2008
7273775 Reliable and scalable virtual ground memory array formed with reduced thermal cycle Sep. 25, 2007
7255772 High pressure processing chamber for semiconductor substrate Aug. 14, 2007
7247256 CMP slurry for forming aluminum film, CMP method using the slurry, and method for forming aluminum wiring using the CMP method Jul. 24, 2007
7241668 Planar magnetic tunnel junction substrate having recessed alignment marks Jul. 10, 2007
7238606 Semiconductor devices and method for fabricating the same Jul. 3, 2007
7235477 Multi-layer interconnection circuit module and manufacturing method thereof Jun. 26, 2007
7226856 Nano-electrode-array for integrated circuit interconnects Jun. 5, 2007
7223685 Damascene fabrication with electrochemical layer removal May. 29, 2007
7217649 System and method for stress free conductor removal May. 15, 2007

1 2 3 4 5 6 7 8 9 10 11 12 13 14


 
 
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