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Class Information
Number: 438/631
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Having planarization step
Description: Processes wherein at least one of the metallization levels or at least one separating insulating layer is leveled into a single plane at any stage in the process.

Sub-classes under this class:

Class Number Class Name Patents
438/633 Simultaneously by chemical and mechanical means 897
438/634 Utilizing etch-stop layer 532
438/632 Utilizing reflow 197

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Patent Number Title Of Patent Date Issued
8703576 Gap-fill keyhole repair using printable dielectric material Apr. 22, 2014
8703612 Process for forming contact plugs Apr. 22, 2014
8679967 Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning Mar. 25, 2014
8673772 Biosensor chip and a method of manufacturing the same Mar. 18, 2014
8609530 Method for forming a three-dimensional structure of metal-insulator-metal type Dec. 17, 2013
8518817 Method of electrolytic plating and semiconductor device fabrication Aug. 27, 2013
8497157 Method of manufacturing a semiconductor device and method of manufacturing a semiconductor package including the same Jul. 30, 2013
8481342 Method of manufacturing semiconductor device, semiconductor device and semiconductor composite device Jul. 9, 2013
8461040 Method of forming shielded gate power transistor utilizing chemical mechanical planarization Jun. 11, 2013
8435830 Methods of fabricating semiconductor devices May. 7, 2013
8409941 Semiconductor device and method for manufacturing the same Apr. 2, 2013
8409986 Method for improving within die uniformity of metal plug chemical mechanical planarization process in gate last route Apr. 2, 2013
8373070 Metal structure of flexible multi-layer substrate and manufacturing method thereof Feb. 12, 2013
8367534 Non-uniformity reduction in semiconductor planarization Feb. 5, 2013
8361854 Fin field-effect transistor structure and manufacturing process thereof Jan. 29, 2013
8329572 Semiconductor device and method for fabricating the same Dec. 11, 2012
8318599 Resin layer formation method and semiconductor device fabrication method Nov. 27, 2012
8293644 Methods of manufacturing a semiconductor memory device Oct. 23, 2012
8288268 Microelectronic structure including air gap Oct. 16, 2012
8247281 Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers Aug. 21, 2012
8226835 Ultra-thin film formation using gas cluster ion beam processing Jul. 24, 2012
8187966 Manufacturing method for semiconductor integrated circuit device May. 29, 2012
8188380 Printed wiring board and method for manufacturing printed wiring board May. 29, 2012
8137995 Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structures Mar. 20, 2012
8125085 Semiconductor device having wiring with oxide layer of impurity from the wiring Feb. 28, 2012
8124525 Method of forming self-aligned local interconnect and structure formed thereby Feb. 28, 2012
8105942 CMP-first damascene process scheme Jan. 31, 2012
8097526 Accessing or interconnecting integrated circuits Jan. 17, 2012
8071468 Semiconductor device and method of manufacturing semiconductor device Dec. 6, 2011
8043959 Method of forming a low-k dielectric layer with improved damage resistance and chemical integrity Oct. 25, 2011
8039339 Separate layer formation in a semiconductor device Oct. 18, 2011
8039293 Method of manufacturing photoelectric conversion device Oct. 18, 2011
8017516 Method for stress free conductor removal Sep. 13, 2011
8012790 Chemical mechanical polishing stop layer for fully amorphous phase change memory pore cell Sep. 6, 2011
8013373 Semiconductor device having MOS-transistor formed on semiconductor substrate and method for manufacturing thereof Sep. 6, 2011
8008187 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface Aug. 30, 2011
8003527 Manufacturing method of semiconductor device Aug. 23, 2011
8003521 Semiconductor processing Aug. 23, 2011
7994048 Method of manufacturing a through electrode Aug. 9, 2011
7985675 Method for fabricating a semiconductor device that includes processing an insulating film to have an upper portion with a different composition than an other portion Jul. 26, 2011
7977233 Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium Jul. 12, 2011
7968447 Semiconductor device and methods of manufacturing the same Jun. 28, 2011
7951712 Interconnections having double capping layer and method for forming the same May. 31, 2011
7947596 Semiconductor device and method of manufacturing the same May. 24, 2011
7939948 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads May. 10, 2011
7935623 Semiconductor device and method for fabricating the same May. 3, 2011
7928003 Air gap interconnects using carbon-based films Apr. 19, 2011
7915160 Methods for forming small contacts Mar. 29, 2011
7910475 Method for forming low dielectric constant fluorine-doped layers Mar. 22, 2011
7897508 Method to eliminate Cu dislocation for reliability and yield Mar. 1, 2011

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

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