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Class Information
Number: 438/626
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > At least one metallization level formed of diverse conductive layers > Planarization
Description: Processes wherein at least one of the metallization levels or at least one separating insulating layer is leveled into a single plane at any stage in the process.

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
7439179 Healing detrimental bonds in deposited materials Oct. 21, 2008
7416985 Semiconductor device having a multilayer interconnection structure and fabrication method thereof Aug. 26, 2008
7407879 Chemical planarization performance for copper/low-k interconnect structures Aug. 5, 2008
7405152 Reducing wire erosion during damascene processing Jul. 29, 2008
7405154 Structure and method of forming electrodeposited contacts Jul. 29, 2008
7399649 Semiconductor light-emitting device and fabrication method thereof Jul. 15, 2008
7399699 On-die reflectance arrangements Jul. 15, 2008
7397122 Metal wiring for semiconductor device and method for forming the same Jul. 8, 2008
7396768 Copper damascene chemical mechanical polishing (CMP) for thin film head writer fabrication Jul. 8, 2008
7396760 Method and system for reducing inter-layer capacitance in integrated circuits Jul. 8, 2008
7387963 Semiconductor wafer and process for producing a semiconductor wafer Jun. 17, 2008
7384864 Top layers of metal for high performance IC's Jun. 10, 2008
7384865 Semiconductor device with a metal line and method of forming the same Jun. 10, 2008
7381638 Fabrication technique using sputter etch and vacuum transfer Jun. 3, 2008
7378348 Polishing compound for insulating film for semiconductor integrated circuit and method for producing semiconductor integrated circuit May. 27, 2008
7375023 Method and apparatus for chemical mechanical polishing of semiconductor substrates May. 20, 2008
7354527 Chemical mechanical polishing pad and chemical mechanical polishing process Apr. 8, 2008
7354853 Selective dry etching of tantalum and tantalum nitride Apr. 8, 2008
7351635 Method of fabricating microelectronic device using super critical fluid Apr. 1, 2008
7348272 Method of fabricating interconnect Mar. 25, 2008
7341937 Semiconductor device and method of manufacturing same Mar. 11, 2008
7338884 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device Mar. 4, 2008
7329953 Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same Feb. 12, 2008
7326632 Method for fabricating metal wirings of semiconductor device Feb. 5, 2008
7323407 Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material Jan. 29, 2008
7323419 Method of fabricating semiconductor device Jan. 29, 2008
7307013 Nonselective unpatterned etchback to expose buried patterned features Dec. 11, 2007
7303988 Methods of manufacturing multi-level metal lines in semiconductor devices Dec. 4, 2007
7287325 Method of forming interconnect structure or interconnect and via structures using post chemical mechanical polishing Oct. 30, 2007
7285226 Method for fabricating a fluid ejection device Oct. 23, 2007
7273775 Reliable and scalable virtual ground memory array formed with reduced thermal cycle Sep. 25, 2007
7273804 Internally reinforced bond pads Sep. 25, 2007
7253097 Integrated circuit system using dual damascene process Aug. 7, 2007
7247528 Methods of fabricating semiconductor integrated circuits using selective epitaxial growth and partial planarization techniques Jul. 24, 2007
7238606 Semiconductor devices and method for fabricating the same Jul. 3, 2007
7238607 Method to minimize formation of recess at surface planarized by chemical mechanical planarization Jul. 3, 2007
7235477 Multi-layer interconnection circuit module and manufacturing method thereof Jun. 26, 2007
7232749 Integrated circuit inductane and the fabrication method thereof Jun. 19, 2007
7232720 Method for fabricating a semiconductor device having an insulation film with reduced water content Jun. 19, 2007
7223685 Damascene fabrication with electrochemical layer removal May. 29, 2007
7217649 System and method for stress free conductor removal May. 15, 2007
7208402 Method and apparatus for improved power routing Apr. 24, 2007
7202160 Method of forming an insulating structure having an insulating interlayer and a capping layer and method of forming a metal wiring structure using the same Apr. 10, 2007
7199043 Method of forming copper wiring in semiconductor device Apr. 3, 2007
7196002 Method of making dual damascene with via etch through Mar. 27, 2007
7189638 Method for manufacturing metal structure using trench Mar. 13, 2007
7183199 Method of reducing the pattern effect in the CMP process Feb. 27, 2007
7179714 Method of fabricating MOS transistor having fully silicided gate Feb. 20, 2007
7179736 Method for fabricating planar semiconductor wafers Feb. 20, 2007
7172963 Manufacturing method of semiconductor integrated circuit device that includes chemically and mechanically polishing two conductive layers using two polishing pads that have different propertie Feb. 6, 2007

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