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Class Information
Number: 438/626
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > At least one metallization level formed of diverse conductive layers > Planarization
Description: Processes wherein at least one of the metallization levels or at least one separating insulating layer is leveled into a single plane at any stage in the process.










Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Patent Number Title Of Patent Date Issued
8105942 CMP-first damascene process scheme Jan. 31, 2012
8097526 Accessing or interconnecting integrated circuits Jan. 17, 2012
8091766 Method and apparatus for loading solder balls Jan. 10, 2012
8093576 Chemical-mechanical polish termination layer to build electrical device isolation Jan. 10, 2012
8084356 Methods of low-K dielectric and metal process integration Dec. 27, 2011
8057857 Phase separation in patterned structures Nov. 15, 2011
8053845 Semiconductor device including dummy gate part and method of fabricating the same Nov. 8, 2011
8053356 Interconnect structure for semiconductor devices Nov. 8, 2011
8048803 Method for forming contact plug in a semiconductor device Nov. 1, 2011
8043959 Method of forming a low-k dielectric layer with improved damage resistance and chemical integrity Oct. 25, 2011
8034705 Method of forming a seam-free tungsten plug Oct. 11, 2011
8017516 Method for stress free conductor removal Sep. 13, 2011
8008187 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface Aug. 30, 2011
8003517 Method for forming interconnects for 3-D applications Aug. 23, 2011
7973410 Semiconductor device Jul. 5, 2011
7968456 Method of forming an embedded barrier layer for protection from chemical mechanical polishing process Jun. 28, 2011
7968462 Noble metal activation layer Jun. 28, 2011
7951707 Etching method for semiconductor element May. 31, 2011
7951706 Method of manufacturing metal interconnection May. 31, 2011
7939446 Process for reversing tone of patterns on integerated circuit and structural process for nanoscale fabrication May. 10, 2011
7927990 Forming complimentary metal features using conformal insulator layer Apr. 19, 2011
7928003 Air gap interconnects using carbon-based films Apr. 19, 2011
7906430 Method of manufacturing a semiconductor device with a peeling prevention layer Mar. 15, 2011
7880293 Wafer integrated with permanent carrier and method therefor Feb. 1, 2011
7875547 Contact hole structures and contact structures and fabrication methods thereof Jan. 25, 2011
7871921 Methods of forming interconnection structures for semiconductor devices Jan. 18, 2011
7871923 Self-aligned air-gap in interconnect structures Jan. 18, 2011
7863173 Variable resistance non-volatile memory cells and methods of fabricating same Jan. 4, 2011
7858513 Fabrication of self-aligned via holes in polymer thin films Dec. 28, 2010
7846839 Film forming method, semiconductor device manufacturing method, semiconductor device, program and recording medium Dec. 7, 2010
7842601 Method of forming small pitch pattern using double spacers Nov. 30, 2010
7842602 Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method Nov. 30, 2010
7838921 Memory cell arrangements Nov. 23, 2010
7829454 Method for integrating selective ruthenium deposition into manufacturing of a semiconductior device Nov. 9, 2010
7825026 Method for processing copper surface, method for forming copper pattern wiring and semiconductor device manufactured using such method Nov. 2, 2010
7825023 Method of manufacturing an interconnection structure Nov. 2, 2010
7820544 Method for forming metal wiring of semiconductor device and a semiconductor device manufactured by the same Oct. 26, 2010
RE41842 Methods of forming electrical interconnects on integrated circuit substrates using selective slurries Oct. 19, 2010
7811927 Method of manufacturing metal line Oct. 12, 2010
7811930 Manufacturing method of dual damascene structure Oct. 12, 2010
RE41697 Method of forming planarized coatings on contact hole patterns of various duty ratios Sep. 14, 2010
7795061 Method of creating MEMS device cavities by a non-etching process Sep. 14, 2010
7795131 Method of fabricating metal interconnects and inter-metal dielectric layer thereof Sep. 14, 2010
7790607 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface Sep. 7, 2010
7790604 Krypton sputtering of thin tungsten layer for integrated circuits Sep. 7, 2010
7776683 Integrated circuit fabrication Aug. 17, 2010
7771779 Planarized microelectronic substrates Aug. 10, 2010
7745327 Method of forming a copper-based metallization layer including a conductive cap layer by an advanced integration regime Jun. 29, 2010
7745326 Semiconductor device having multiple wiring layers and method of producing the same Jun. 29, 2010
7737038 Method of fabricating semiconductor device including planarizing conductive layer using parameters of pattern density and depth of trenches Jun. 15, 2010

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