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Class Information
Number: 438/626
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > At least one metallization level formed of diverse conductive layers > Planarization
Description: Processes wherein at least one of the metallization levels or at least one separating insulating layer is leveled into a single plane at any stage in the process.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8709939 Semiconductor device having a multilevel interconnect structure and method for fabricating the same Apr. 29, 2014
8703612 Process for forming contact plugs Apr. 22, 2014
8679966 Semiconductor device having Au-Cu electrodes, and method of manufacturing semiconductor device Mar. 25, 2014
8679967 Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning Mar. 25, 2014
8669176 BEOL integration scheme for copper CMP to prevent dendrite formation Mar. 11, 2014
8637403 Locally tailoring chemical mechanical polishing (CMP) polish rate for dielectrics Jan. 28, 2014
8609528 High-density patterning Dec. 17, 2013
8541307 Treatment method for reducing particles in dual damascene silicon nitride process Sep. 24, 2013
8524587 Non-uniformity reduction in semiconductor planarization Sep. 3, 2013
8518817 Method of electrolytic plating and semiconductor device fabrication Aug. 27, 2013
8518818 Reverse damascene process Aug. 27, 2013
8513815 Implementing integrated circuit mixed double density and high performance wire structure Aug. 20, 2013
8481342 Method of manufacturing semiconductor device, semiconductor device and semiconductor composite device Jul. 9, 2013
8461040 Method of forming shielded gate power transistor utilizing chemical mechanical planarization Jun. 11, 2013
8455348 Manufacturing method of semiconductor device Jun. 4, 2013
8450197 Contact elements of a semiconductor device formed by electroless plating and excess material removal with reduced sheer forces May. 28, 2013
8434664 Micro-ball loading device and loading method May. 7, 2013
8420527 Semiconductor integrated circuit device Apr. 16, 2013
8409941 Semiconductor device and method for manufacturing the same Apr. 2, 2013
8409986 Method for improving within die uniformity of metal plug chemical mechanical planarization process in gate last route Apr. 2, 2013
8394656 Method of creating MEMS device cavities by a non-etching process Mar. 12, 2013
8383509 Manufacture method for semiconductor device having improved copper diffusion preventive function of plugs and wirings made of copper or copper alloy and semiconductor device of this kind Feb. 26, 2013
8373273 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Feb. 12, 2013
8367534 Non-uniformity reduction in semiconductor planarization Feb. 5, 2013
8338198 Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device Dec. 25, 2012
8330275 Interconnect structure for semiconductor devices Dec. 11, 2012
8324098 Via and method of forming the via with a substantially planar top surface that is suitable for carbon nanotube applications Dec. 4, 2012
8318599 Resin layer formation method and semiconductor device fabrication method Nov. 27, 2012
8293644 Methods of manufacturing a semiconductor memory device Oct. 23, 2012
8288268 Microelectronic structure including air gap Oct. 16, 2012
8288271 Method for reworking antireflective coating over semiconductor substrate Oct. 16, 2012
8288273 Method for forming a patterned thick metallization atop a power semiconductor chip Oct. 16, 2012
8278206 Variable resistance memory device and methods of forming the same Oct. 2, 2012
8278215 Noble metal activation layer Oct. 2, 2012
8273653 Microscopic structure packaging method and device with packaged microscopic structure Sep. 25, 2012
8259464 Wafer level package (WLP) device having bump assemblies including a barrier metal Sep. 4, 2012
8236682 Method of forming contact structure Aug. 7, 2012
8232195 Method for fabricating back end of the line structures with liner and seed materials Jul. 31, 2012
8232200 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Jul. 31, 2012
8207058 Electron beam induced deposition of interface to carbon nanotube Jun. 26, 2012
8178435 High performance system-on-chip inductor using post passivation process May. 15, 2012
8178437 Barrier material and process for Cu interconnect May. 15, 2012
8173548 Reverse planarization method May. 8, 2012
8163642 Package substrate with dual material build-up layers Apr. 24, 2012
8143156 Methods of forming high density semiconductor devices using recursive spacer technique Mar. 27, 2012
8137995 Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structures Mar. 20, 2012
8129268 Self-aligned lower bottom electrode Mar. 6, 2012
8129278 Chemical mechanical polishing process Mar. 6, 2012
8125073 Wafer integrated with permanent carrier and method therefor Feb. 28, 2012
8119519 Semiconductor device manufacturing method Feb. 21, 2012

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