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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
7067421 Multilevel copper interconnect with double passivation Jun. 27, 2006
7067415 Low k interlevel dielectric layer fabrication methods Jun. 27, 2006
7067414 Low k interlevel dielectric layer fabrication methods Jun. 27, 2006
7064061 Process for fabricating interconnect networks Jun. 20, 2006
7060634 Materials and methods for forming hybrid organic-inorganic dielectric materials for integrated circuit applications Jun. 13, 2006
7057289 Etch stop in damascene interconnect structure and method of making Jun. 6, 2006
7056824 Electronic device manufacture Jun. 6, 2006
7056821 Method for manufacturing dual damascene structure with a trench formed first Jun. 6, 2006
7052936 Use of polybenzoxazoles (PBOS) for adhesion May. 30, 2006
7052621 Bilayered metal hardmasks for use in Dual Damascene etch schemes May. 30, 2006
7049153 Polymer-based ferroelectric memory May. 23, 2006
7049220 Method of forming cavity between multilayered wirings May. 23, 2006
7045897 Electrical assembly with internal memory circuitized substrate having electronic components positioned thereon, method of making same, and information handling system utilizing same May. 16, 2006
7045453 Very low effective dielectric constant interconnect structures and methods for fabricating the same May. 16, 2006
7045452 Circuit structures and methods of forming circuit structures with minimal dielectric constant layers May. 16, 2006
7035140 Organic-polymer memory element Apr. 25, 2006
7026237 Fill material for dual damascene processes Apr. 11, 2006
7026716 Self-assembled sub-nanolayers as interfacial adhesion enhancers and diffusion barriers Apr. 11, 2006
7026234 Parasitic capacitance-preventing dummy solder bump structure and method of making the same Apr. 11, 2006
7022600 Method of forming dual damascene interconnection using low-k dielectric material Apr. 4, 2006
7023093 Very low effective dielectric constant interconnect Structures and methods for fabricating the same Apr. 4, 2006
7018918 Method of forming a selectively converted inter-layer dielectric using a porogen material Mar. 28, 2006
7015149 Simplified dual damascene process Mar. 21, 2006
7015581 Low-K dielectric material system for IC application Mar. 21, 2006
6998148 Porous materials Feb. 14, 2006
6998356 Method of fabricating a semiconductor device including a dielectric layer formed using a reactive agent Feb. 14, 2006
6991959 Method of manufacturing silicon carbide film Jan. 31, 2006
6989288 Organic EL display device having organic soluble derivative layer Jan. 24, 2006
6984581 Structural reinforcement of highly porous low k dielectric films by ILD posts Jan. 10, 2006
6979637 Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming Dec. 27, 2005
6979639 Method for lithographic processing on molecular monolayer and multilayer thin films Dec. 27, 2005
6972217 Low k polymer E-beam printable mechanical support Dec. 6, 2005
6972209 Stacked via-stud with improved reliability in copper metallurgy Dec. 6, 2005
6967407 Semiconductor device and method of manufacturing the semiconductor device Nov. 22, 2005
6962869 SiOCH low k surface protection layer formation by CxHy gas plasma treatment Nov. 8, 2005
6962875 Variable contact method and structure Nov. 8, 2005
6958524 Insulating layer having graded densification Oct. 25, 2005
6958526 Electronic structures with reduced capacitance Oct. 25, 2005
6951764 Ferroelectric memory device with a conductive polymer layer and a method of formation Oct. 4, 2005
6949456 Method for manufacturing semiconductor device having porous structure with air-gaps Sep. 27, 2005
6949829 Semiconductor device and fabrication method therefor Sep. 27, 2005
6946381 Method of forming insulating film in semiconductor device Sep. 20, 2005
6939738 Component built-in module and method for producing the same Sep. 6, 2005
6936533 Method of fabricating semiconductor devices having low dielectric interlayer insulation layer Aug. 30, 2005
6927180 Reducing line to line capacitance using oriented dielectric films Aug. 9, 2005
6924222 Formation of interconnect structures by removing sacrificial material with supercritical carbon dioxide Aug. 2, 2005
6924545 Low-dielectric-constant interlayer insulating film composed of borazine-silicon-based polymer and semiconductor device Aug. 2, 2005
6919266 Copper technology for ULSI metallization Jul. 19, 2005
6913992 Method of modifying interlayer adhesion Jul. 5, 2005
RE38753 Interconnect structure and method for forming the same Jul. 5, 2005

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