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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
7238626 Chemically and electrically stabilized polymer films Jul. 3, 2007
7238605 Circuit structures and methods of forming circuit structures with minimal dielectric constant layers Jul. 3, 2007
7235477 Multi-layer interconnection circuit module and manufacturing method thereof Jun. 26, 2007
7232750 Methods involving spin-on polymers that reversibly bind charge carriers Jun. 19, 2007
7232749 Integrated circuit inductane and the fabrication method thereof Jun. 19, 2007
7229908 System and method for manufacturing an out of plane integrated circuit inductor Jun. 12, 2007
7227179 Circuit materials, circuits, multi-layer circuits, and methods of manufacture thereof Jun. 5, 2007
7223688 Single level metal memory cell using chalcogenide cladding May. 29, 2007
7211504 Process and arrangement for the selective metallization of 3D structures May. 1, 2007
7208402 Method and apparatus for improved power routing Apr. 24, 2007
7205224 Very low dielectric constant plasma-enhanced CVD films Apr. 17, 2007
7205230 Process for manufacturing a wiring board having a via Apr. 17, 2007
7202159 Diffusion barriers comprising a self-assembled monolayer Apr. 10, 2007
7202496 Thin film transistor, display device and their production Apr. 10, 2007
7202157 Method for forming metallic interconnects in semiconductor devices Apr. 10, 2007
7196002 Method of making dual damascene with via etch through Mar. 27, 2007
7189657 Semiconductor substrate surface protection method Mar. 13, 2007
7189637 Method of manufacturing a semiconductor device having a multi-layered wiring structure Mar. 13, 2007
7186641 Methods of forming metal interconnection lines in semiconductor devices Mar. 6, 2007
7179734 Method for forming dual damascene pattern Feb. 20, 2007
7179732 Interconnection structure and fabrication method thereof Feb. 20, 2007
7179399 Material for forming protective film Feb. 20, 2007
7180195 Method and apparatus for improved power routing Feb. 20, 2007
7169698 Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner Jan. 30, 2007
7166531 VLSI fabrication processes for introducing pores into dielectric materials Jan. 23, 2007
7166545 Production method for semiconductor device Jan. 23, 2007
7157367 Device structure having enhanced surface adhesion and failure mode analysis Jan. 2, 2007
7151052 Multiple etch-stop layer deposition scheme and materials Dec. 19, 2006
7148103 Multilevel poly-Si tiling for semiconductor circuit manufacture Dec. 12, 2006
7144808 Integration flow to prevent delamination from copper Dec. 5, 2006
7144828 He treatment to improve low-k adhesion property Dec. 5, 2006
7135400 Damascene process capable of avoiding via resist poisoning Nov. 14, 2006
7129159 Integrated dual damascene RIE process with organic patterning layer Oct. 31, 2006
7125794 Method of manufacturing semiconductor device Oct. 24, 2006
7119007 Production method of semiconductor device Oct. 10, 2006
7109108 Method for manufacturing semiconductor device having metal silicide Sep. 19, 2006
7101784 Method to generate porous organic dielectric Sep. 5, 2006
7098061 Forming interconnects using locally deposited solvents Aug. 29, 2006
7098127 Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment Aug. 29, 2006
7094683 Dual damascene method for ultra low K dielectrics Aug. 22, 2006
7094681 Semiconductor device fabrication method Aug. 22, 2006
7095119 Semiconductor device Aug. 22, 2006
7091611 Multilevel copper interconnects with low-k dielectrics and air gaps Aug. 15, 2006
7084065 Method for fabricating a semiconductor device Aug. 1, 2006
7078350 Methods for the optimization of substrate etching in a plasma processing system Jul. 18, 2006
7078333 Method to improve adhesion of dielectric films in damascene interconnects Jul. 18, 2006
7074708 Method of decreasing the k value in sioc layer deposited by chemical vapor deposition Jul. 11, 2006
7071540 Siloxane-based resin and a semiconductor interlayer insulating film using the same Jul. 4, 2006
7071125 Precursors for film formation Jul. 4, 2006
7067346 Titanium carboxylate films for use in semiconductor processing Jun. 27, 2006

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