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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
5702980 Method for forming intermetal dielectric with SOG etchback and CMP Dec. 30, 1997
5643407 Solving the poison via problem by adding N.sub.2 plasma treatment after via etching Jul. 1, 1997
5635428 Global planarization using a polyimide block Jun. 3, 1997
5607773 Method of forming a multilevel dielectric Mar. 4, 1997
5591676 Method of making a semiconductor device having a low permittivity dielectric Jan. 7, 1997
5591677 Planarizeed multi-level interconnect scheme with embedded low-dielectric constant insulators Jan. 7, 1997
5589424 Photodefinable dielectric layers comprising poly(aromatic diacetylenes) Dec. 31, 1996
5565384 Self-aligned via using low permittivity dielectric Oct. 15, 1996
5559055 Method of decreased interlayer dielectric constant in a multilayer interconnect structure to increase device speed performance Sep. 24, 1996
5556812 Connection and build-up technique for multichip modules Sep. 17, 1996
5538920 Method of fabricating semiconductor device Jul. 23, 1996
5538920 Method of fabricating semiconductor device Jul. 23, 1996
5527737 Selective formation of low-density, low-dielectric-constant insulators in narrow gaps for line-to-line capacitance reduction Jun. 18, 1996
5516729 Method for planarizing a semiconductor topography using a spin-on glass material with a variable chemical-mechanical polish rate May. 14, 1996
5514624 Method of manufacturing a microelectronic interlayer dielectric structure May. 7, 1996
5486493 Planarized multi-level interconnect scheme with embedded low-dielectric constant insulators Jan. 23, 1996
5482900 Method for forming a metallurgy system having a dielectric layer that is planar and void free Jan. 9, 1996
5482894 Method of fabricating a self-aligned contact using organic dielectric materials Jan. 9, 1996
5476817 Method of making reliable metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers Dec. 19, 1995
5474651 Method for filling via holes in a semiconductor layer structure Dec. 12, 1995
5474956 Method of fabricating metallized substrates using an organic etch block layer Dec. 12, 1995
5470793 Method of via formation for the multilevel interconnect integrated circuits Nov. 28, 1995
5468685 Method for producing a semiconductor integrated circuit Nov. 21, 1995
5413963 Method for depositing an insulating interlayer in a semiconductor metallurgy system May. 9, 1995
5405805 Method for forming interconnect structure, insulating films and surface protective films of semiconductor device Apr. 11, 1995
5403437 Fluorosurfactant in photoresist for amorphous "Teflon" patterning Apr. 4, 1995
5395796 Etch stop layer using polymers for integrated circuits Mar. 7, 1995
5382544 Manufacturing method of a semiconductor device utilizing thin metal film Jan. 17, 1995
5376574 Capped modular microwave integrated circuit and method of making same Dec. 27, 1994
5376586 Method of curing thin films of organic dielectric material Dec. 27, 1994
5371047 Chip interconnection having a breathable etch stop layer Dec. 6, 1994
5354713 Contact manufacturing method of a multi-layered metal line structure Oct. 11, 1994
5305519 Multilevel interconnect structure and method of manufacturing the same Apr. 26, 1994
5302548 Semiconductor device manufacturing method Apr. 12, 1994
5284801 Methods of moisture protection in semiconductor devices utilizing polyimides for inter-metal dielectric Feb. 8, 1994
5283208 Method of making a submicrometer local structure using an organic mandrel Feb. 1, 1994
5282922 Hybrid circuit structures and methods of fabrication Feb. 1, 1994
5275973 Method for forming metallization in an integrated circuit Jan. 4, 1994
5270259 Method for fabricating an insulating film from a silicone resin using O.sub . Dec. 14, 1993
5266446 Method of making a multilayer thin film structure Nov. 30, 1993
5200300 Methods for forming high density multi-chip carriers Apr. 6, 1993
5194928 Passivation of metal in metal/polyimide structure Mar. 16, 1993
5194924 Semiconductor device of an LDD structure having a floating gate Mar. 16, 1993
5171713 Process for forming planarized, air-bridge interconnects on a semiconductor substrate Dec. 15, 1992
5141896 Process for the production of crossing points for interconnections of semiconductor devices Aug. 25, 1992
5128279 Charge neutralization using silicon-enriched oxide layer Jul. 7, 1992
5114757 Enhancement of polyimide adhesion on reactive metals May. 19, 1992
5114754 Passivation of metal in metal/polyimide structures May. 19, 1992
5112448 Self-aligned process for fabrication of interconnect structures in semiconductor applications May. 12, 1992
5110712 Incorporation of dielectric layers in a semiconductor May. 5, 1992

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