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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
5382544 Manufacturing method of a semiconductor device utilizing thin metal film Jan. 17, 1995
5376574 Capped modular microwave integrated circuit and method of making same Dec. 27, 1994
5376586 Method of curing thin films of organic dielectric material Dec. 27, 1994
5371047 Chip interconnection having a breathable etch stop layer Dec. 6, 1994
5354713 Contact manufacturing method of a multi-layered metal line structure Oct. 11, 1994
5305519 Multilevel interconnect structure and method of manufacturing the same Apr. 26, 1994
5302548 Semiconductor device manufacturing method Apr. 12, 1994
5284801 Methods of moisture protection in semiconductor devices utilizing polyimides for inter-metal dielectric Feb. 8, 1994
5282922 Hybrid circuit structures and methods of fabrication Feb. 1, 1994
5283208 Method of making a submicrometer local structure using an organic mandrel Feb. 1, 1994
5275973 Method for forming metallization in an integrated circuit Jan. 4, 1994
5270259 Method for fabricating an insulating film from a silicone resin using O.sub . Dec. 14, 1993
5266446 Method of making a multilayer thin film structure Nov. 30, 1993
5200300 Methods for forming high density multi-chip carriers Apr. 6, 1993
5194928 Passivation of metal in metal/polyimide structure Mar. 16, 1993
5194924 Semiconductor device of an LDD structure having a floating gate Mar. 16, 1993
5171713 Process for forming planarized, air-bridge interconnects on a semiconductor substrate Dec. 15, 1992
5141896 Process for the production of crossing points for interconnections of semiconductor devices Aug. 25, 1992
5128279 Charge neutralization using silicon-enriched oxide layer Jul. 7, 1992
5114757 Enhancement of polyimide adhesion on reactive metals May. 19, 1992
5114754 Passivation of metal in metal/polyimide structures May. 19, 1992
5112448 Self-aligned process for fabrication of interconnect structures in semiconductor applications May. 12, 1992
5110712 Incorporation of dielectric layers in a semiconductor May. 5, 1992
5109267 Method for producing an integrated circuit structure with a dense multilayer metallization pattern Apr. 28, 1992
5103288 Semiconductor device having multilayered wiring structure with a small parasitic capacitance Apr. 7, 1992
5091339 Trenching techniques for forming vias and channels in multilayer electrical interconnects Feb. 25, 1992
5091289 Process for forming multi-level coplanar conductor/insulator films employing photosensitive polyimide polymer compositions Feb. 25, 1992
5024969 Hybrid circuit structure fabrication methods using high energy electron beam curing Jun. 18, 1991
5023205 Method of fabricating hybrid circuit structures Jun. 11, 1991
4963512 Method for forming conductor layers and method for fabricating multilayer substrates Oct. 16, 1990
4874721 Method of manufacturing a multichip package with increased adhesive strength Oct. 17, 1989
4857481 Method of fabricating airbridge metal interconnects Aug. 15, 1989
4843034 Fabrication of interlayer conductive paths in integrated circuits Jun. 27, 1989
4840923 Simultaneous multiple level interconnection process Jun. 20, 1989
4837183 Semiconductor device metallization process Jun. 6, 1989
4816115 Process of making via holes in a double-layer insulation Mar. 28, 1989
4803177 Method of forming interconnections and crossings between metallization levels of an integrated circuit Feb. 7, 1989
4801507 Arylsiloxane/silicate compositions useful as interlayer dielectric films Jan. 31, 1989
4743568 Multilevel interconnect transfer process May. 10, 1988
4721689 Method for simultaneously forming an interconnection level and via studs Jan. 26, 1988
4699803 Method for forming electrical components comprising cured vinyl and/or acetylene terminated copolymers Oct. 13, 1987
4670967 Forming multilayer interconnections for a semiconductor device by vapor phase growth process Jun. 9, 1987
H274 Method of manufacturing an integrated circuit chip and integrated circuit chip produced thereby May. 5, 1987
4656050 Method of producing electronic components utilizing cured vinyl and/or acetylene terminated copolymers Apr. 7, 1987
4654113 Process for fabricating a semiconductor device Mar. 31, 1987
4654223 Method for forming a film of dielectric material on an electric component Mar. 31, 1987
4639277 Semiconductor material on a substrate, said substrate comprising, in order, a layer of organic polymer, a layer of metal or metal alloy and a layer of dielectric material Jan. 27, 1987
4618878 Semiconductor device having a multilayer wiring structure using a polyimide resin Oct. 21, 1986
4569876 Multi-layered substrate having a fine wiring structure for LSI or VLSI circuits Feb. 11, 1986
4536951 Method of producing a layered structure Aug. 27, 1985

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