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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6037249 Method for forming air gaps for advanced interconnect systems Mar. 14, 2000
6030901 Photoresist stripping without degrading low dielectric constant materials Feb. 29, 2000
6030904 Stabilization of low-k carbon-based dielectrics Feb. 29, 2000
6030891 Vacuum baked HSQ gap fill layer for high integrity borderless vias Feb. 29, 2000
6027995 Method for fabricating an interconnect structure with hard mask and low dielectric constant materials Feb. 22, 2000
6022762 Process for forming a morphological edge structure to seal integrated electronic devices Feb. 8, 2000
6010957 Semiconductor device having tapered conductive lines and fabrication thereof Jan. 4, 2000
6010956 Process for producing multilayer wiring boards Jan. 4, 2000
6008116 Selective etching for improved dielectric interlayer planarization Dec. 28, 1999
6001747 Process to improve adhesion of cap layers in integrated circuits Dec. 14, 1999
5998303 Semiconductor device making method Dec. 7, 1999
5990558 Reduced cracking in gap filling dielectrics Nov. 23, 1999
5989998 Method of forming interlayer insulating film Nov. 23, 1999
5985749 Method of forming a via hole structure including CVD tungsten silicide barrier layer Nov. 16, 1999
5985750 Manufacturing method of semiconductor device Nov. 16, 1999
5973908 Structure for thin film capacitors Oct. 26, 1999
5970381 Method for fabricating organic thin film Oct. 19, 1999
5960311 Method for forming controlled voids in interlevel dielectric Sep. 28, 1999
5953627 Process for manufacture of integrated circuit device Sep. 14, 1999
5946601 Unique .alpha.-C:N:H/.alpha.-C:N.sub.x film liner/barrier to prevent fluorine outdiffusion from .alpha.-FC chemical vapor deposition dielectric layers Aug. 31, 1999
5943599 Method of fabricating a passivation layer for integrated circuits Aug. 24, 1999
5942802 Semiconductor device and method of producing the same Aug. 24, 1999
5940734 Method of fabricating a wiring on a planarized surface Aug. 17, 1999
5937321 Method for manufacturing ceramic multilayer circuit Aug. 10, 1999
5937322 Semiconductor manufacturing process with oxide film formed on an uneven surface pattern Aug. 10, 1999
5924005 Process for forming a semiconductor device Jul. 13, 1999
5920790 Method of forming a semiconductor device having dual inlaid structure Jul. 6, 1999
5915200 Film forming method and semiconductor device manufacturing method Jun. 22, 1999
5904556 Method for making semiconductor integrated circuit device having interconnection structure using tungsten film May. 18, 1999
5899751 Method for forming a planarized dielectric layer May. 4, 1999
5898194 Integrated circuit cell architecture and routing scheme Apr. 27, 1999
5895263 Process for manufacture of integrated circuit device Apr. 20, 1999
5893727 Method for manufacturing a massive parallel interconnection attachment using flexible circuit Apr. 13, 1999
5886410 Interconnect structure with hard mask and low dielectric constant materials Mar. 23, 1999
5880018 Method for manufacturing a low dielectric constant inter-level integrated circuit structure Mar. 9, 1999
5858877 Self-aligned process for making contacts to silicon substrates during the manufacture of integrated circuits therein Jan. 12, 1999
5858871 Porous insulator for line-to-line capacitance reduction Jan. 12, 1999
5840622 Phase mask laser fabrication of fine pattern electronic interconnect structures Nov. 24, 1998
5827775 Phase mask laser fabrication of fine pattern electronic interconnect structures Oct. 27, 1998
5821621 Low capacitance interconnect structure for integrated circuits Oct. 13, 1998
5821162 Method of forming multi-layer wiring utilizing SOG Oct. 13, 1998
5814558 Interconnect capacitance between metal leads Sep. 29, 1998
5811352 Method of making reliable metal leads in high speed LSI semiconductors using dummy leads Sep. 22, 1998
5807787 Method for reducing surface leakage current on semiconductor intergrated circuits during polyimide passivation Sep. 15, 1998
5801092 Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices Sep. 1, 1998
5795819 Integrated pad and fuse structure for planar copper metallurgy Aug. 18, 1998
5783481 Semiconductor interlevel dielectric having a polymide for producing air gaps Jul. 21, 1998
5780121 Method for preparing a fluoro-containing polyimide film Jul. 14, 1998
5767014 Integrated circuit and process for its manufacture Jun. 16, 1998
5759906 Planarization method for intermetal dielectrics between multilevel interconnections on integrated circuits Jun. 2, 1998

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