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Class Information
Number: 438/623
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) > Including organic insulating material between metal levels
Description: Processes wherein the intervening dielectric is at least partly composed of organic insulating material.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6504248 Thin film circuit substrate and manufacturing method therefor Jan. 7, 2003
6503849 Method for forming insulating film Jan. 7, 2003
6503825 Method for forming multi-layer wiring structure Jan. 7, 2003
6500751 Method of forming recessed thin film landing pad structure Dec. 31, 2002
6500752 Semiconductor device and semiconductor device manufacturing method Dec. 31, 2002
6495468 Laser ablative removal of photoresist Dec. 17, 2002
6495447 Use of hydrogen doping for protection of low-k dielectric layers Dec. 17, 2002
6495445 Semi-sacrificial diamond for air dielectric formation Dec. 17, 2002
6492258 METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25-.mu.M AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOS Dec. 10, 2002
6492257 Water vapor plasma for effective low-k dielectric resist stripping Dec. 10, 2002
6486057 Process for preparing Cu damascene interconnection Nov. 26, 2002
6483193 Fabrication process for a semiconductor device with damascene interconnect lines of the same level separated by insulators with different dielectric constants Nov. 19, 2002
6479884 Interim oxidation of silsesquioxane dielectric for dual damascene process Nov. 12, 2002
6479399 Method of forming interlevel dielectric layer of semiconductor device Nov. 12, 2002
6472312 Methods for inhibiting microelectronic damascene processing induced low dielectric constant dielectric layer physical degradation Oct. 29, 2002
6472306 Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymer Oct. 29, 2002
6468921 Thin-film forming method Oct. 22, 2002
6465342 Semiconductor device and its manufacturing method Oct. 15, 2002
6458691 Dual inlaid process using an imaging layer to protect via from poisoning Oct. 1, 2002
6458687 Method for forming conductive structures Oct. 1, 2002
6455415 Method of encapsulated copper (Cu) interconnect formation Sep. 24, 2002
6455443 Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density Sep. 24, 2002
6455416 Developer soluble dyed BARC for dual damascene process Sep. 24, 2002
6451683 Damascene structure and method of making Sep. 17, 2002
6451684 Semiconductor device having a conductive layer side surface slope which is at least 90.degree. and method for manufacturing the same Sep. 17, 2002
6451686 Control of semiconductor device isolation properties through incorporation of fluorine in peteos films Sep. 17, 2002
6445070 Coherent carbide diffusion barrier for integrated circuit interconnects Sep. 3, 2002
6436808 NH3/N2-plasma treatment to prevent organic ILD degradation Aug. 20, 2002
6436850 Method of degassing low k dielectric for metal deposition Aug. 20, 2002
6432839 Film forming method and manufacturing method of semiconductor device Aug. 13, 2002
6432843 Methods of manufacturing integrated circuit devices in which a spin on glass insulation layer is dissolved so as to recess the spin on glass insulation layer from the upper surface of a patter Aug. 13, 2002
6429116 Method of fabricating a slot dual damascene structure without middle stop layer Aug. 6, 2002
6423628 Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines Jul. 23, 2002
6420278 Method for improving the dielectric constant of silicon-based semiconductor materials Jul. 16, 2002
6417095 Method for fabricating a dual damascene structure Jul. 9, 2002
6417116 Semiconductor device having a multilayer interconnection structure Jul. 9, 2002
6410414 Method for fabricating a semiconductor device Jun. 25, 2002
6410356 Silicon carbide large area device fabrication apparatus and method Jun. 25, 2002
6406993 Method of defining small openings in dielectric layers Jun. 18, 2002
6403471 Method of forming a dual damascene structure including smoothing the top part of a via Jun. 11, 2002
6403464 Method to reduce the moisture content in an organic low dielectric constant material Jun. 11, 2002
6400024 Method of providing a vertical interconnect between thin film microelectronic devices Jun. 4, 2002
6399478 Method of making a dual damascene structure with modified insulation Jun. 4, 2002
6395631 Low dielectric constant dielectric layer fabrication method employing hard mask layer delamination May. 28, 2002
6391764 Method for fabricating semiconductor device May. 21, 2002
6392297 Electronic circuit element of conductor/insulator stacked type using high machinability substrate and benzocyclobutene as insulator May. 21, 2002
6391932 Porous materials May. 21, 2002
6391795 Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning May. 21, 2002
6387803 Method for forming a silicide region on a silicon body May. 14, 2002
6387798 Method of etching trenches for metallization of integrated circuit devices with a narrower width than the design mask profile May. 14, 2002

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