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Class Information
Number: 438/622
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects) > Multiple metal levels, separated by insulating layer (i.e., multiple level metallization)
Description: Processes wherein there are plural levels of metal forming electrical contact material, the levels being separated by intervening dielectric material except at designated openings therethrough.

Sub-classes under this class:

Class Number Class Name Patents
438/625 At least one metallization level formed of diverse conductive layers 510
438/631 Having planarization step 759
438/623 Including organic insulating material between metal levels 951
438/636 Including use of antireflective layer 456
438/635 Insulator formed by reaction with conductor (e.g., oxidation, etc.) 222
438/641 Selective deposition 223
438/624 Separating insulating layer is laminate or composite of plural insulating materials 1,572
438/637 With formation of opening (i.e., viahole) in insulative layer 3,347

Patents under this class:

Patent Number Title Of Patent Date Issued
8216931 Methods for forming multi-layer three-dimensional structures Jul. 10, 2012
8216881 Method for fabricating a semiconductor and semiconductor package Jul. 10, 2012
8212357 Combination via and pad structure for improved solder bump electromigration characteristics Jul. 3, 2012
8212331 Method for fabricating a backside through-wafer via in a processed wafer and related structure Jul. 3, 2012
8211790 Multilayered circuitized substrate with P-aramid dielectric layers and method of making same Jul. 3, 2012
8211783 Method for manufacturing semiconductor device including a patterned SiOC film as a mask Jul. 3, 2012
8211755 Method for multi-level interconnection memory device Jul. 3, 2012
8211744 Methods of forming nano structure and methods of forming solar cell using the same Jul. 3, 2012
8211718 Semiconductor device and method of visual inspection and apparatus for visual inspection Jul. 3, 2012
8203776 Planarity of pixel mirrors Jun. 19, 2012
8198191 Method of preparing low resistance metal line, patterned metal line structure, and display device using the same Jun. 12, 2012
8198190 Semiconductor device and method for patterning vertical contacts and metal lines in a common etch process Jun. 12, 2012
8198188 Self-aligned VIAS for semiconductor devices Jun. 12, 2012
8198183 Forming method of etching mask, control program and program storage medium Jun. 12, 2012
8193090 Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region Jun. 5, 2012
8188603 Post passivation interconnection schemes on top of IC chip May. 29, 2012
8188602 Semiconductor device having multilevel copper wiring layers and its manufacture method May. 29, 2012
8186049 Method of making a circuit structure May. 29, 2012
8183150 Semiconductor device having silicon carbide and conductive pathway interface May. 22, 2012
8183148 Method of fabricating semiconductor device and semiconductor device May. 22, 2012
8178927 Integrated circuits having a contact structure having an elongate structure and methods for manufacturing the same May. 15, 2012
8178437 Barrier material and process for Cu interconnect May. 15, 2012
8178435 High performance system-on-chip inductor using post passivation process May. 15, 2012
8174125 Manufacturing method of a semiconductor device May. 8, 2012
8174121 Semiconductor device and manufacturing method thereof May. 8, 2012
8173539 Method for fabricating metal redistribution layer May. 8, 2012
8173538 Method of selectively forming a conductive barrier layer by ALD May. 8, 2012
8169015 Semiconductor device and manufacturing method therefor May. 1, 2012
8168530 Methods of forming one transistor DRAM devices May. 1, 2012
8168529 Forming seal ring in an integrated circuit die May. 1, 2012
8168471 Semiconductor device and manufacturing method of a semiconductor device May. 1, 2012
8168470 Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound May. 1, 2012
8164190 Structure of power grid for semiconductor devices and method of making the same Apr. 24, 2012
8163646 Interconnection wiring structure of a semiconductor device and method for manufacturing same Apr. 24, 2012
8163645 Method for providing a redistribution metal layer in an integrated circuit Apr. 24, 2012
8158509 Method of manufacturing semiconductor device Apr. 17, 2012
8158505 Method for manufacturing a semiconductor device, semiconductor chip and semiconductor wafer Apr. 17, 2012
8153503 Protection of cavities opening onto a face of a microstructured element Apr. 10, 2012
8148259 Method for manufacturing semiconductor device Apr. 3, 2012
8148257 Semiconductor structure and method for making same Apr. 3, 2012
8143156 Methods of forming high density semiconductor devices using recursive spacer technique Mar. 27, 2012
8138539 Semiconductor devices and methods of manufacture thereof Mar. 20, 2012
8133813 Semiconductor device with a barrier film Mar. 13, 2012
8133810 Structure for metal cap applications Mar. 13, 2012
8129627 Circuit board having semiconductor chip Mar. 6, 2012
8129624 Pressure sensor Mar. 6, 2012
8129268 Self-aligned lower bottom electrode Mar. 6, 2012
8129266 Method of forming a shielded semiconductor device and structure therefor Mar. 6, 2012
8129265 High performance system-on-chip discrete components using post passivation process Mar. 6, 2012
8129256 3D integrated circuit device fabrication with precisely controllable substrate removal Mar. 6, 2012

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