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Class Information
Number: 438/618
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects)
Description: Processes wherein the electrical contact is formed so as to make electrical contact to plural semiconductive regions










Sub-classes under this class:

Class Number Class Name Patents
438/619 Air bridge structure 512
438/621 Contacting diversely doped semiconductive regions (e.g., p-type and n-type regions, etc.) 190
438/642 Diverse conductors 261
438/620 Forming contacts of differing depths into semiconductor substrate 405
438/622 Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) 2,472


Patents under this class:

Patent Number Title Of Patent Date Issued
8361898 Bonding pad structure for back illuminated optoelectronic device and fabricating method thereof Jan. 29, 2013
8361857 Semiconductor device having a simplified stack and method for manufacturing thereof Jan. 29, 2013
8357591 Method of processing a wafer by using and reusing photolithographic masks Jan. 22, 2013
8354346 Method for fabricating low-k dielectric and Cu interconnect Jan. 15, 2013
8354341 Method for forming an interconnect structure Jan. 15, 2013
8354339 Methods to form self-aligned permanent on-chip interconnect structures Jan. 15, 2013
8349666 Fused buss for plating features on a semiconductor die Jan. 8, 2013
8344513 Barrier for through-silicon via Jan. 1, 2013
8344477 Semiconductor chip, semiconductor wafer, method of manufacturing semiconductor chip Jan. 1, 2013
8344474 Microstructure device including a metallization structure with self-aligned air gaps and refilled air gap exclusion zones Jan. 1, 2013
8343868 Device and methodology for reducing effective dielectric constant in semiconductor devices Jan. 1, 2013
8334466 Multilayer printed wiring board Dec. 18, 2012
8334206 Method for producing metallic interconnect lines Dec. 18, 2012
8334169 Integrated circuit packaging system and method of manufacture thereof Dec. 18, 2012
8330274 Semiconductor structure and method for making same Dec. 11, 2012
8329573 Wafer level integration module having controlled resistivity interconnects Dec. 11, 2012
8329572 Semiconductor device and method for fabricating the same Dec. 11, 2012
8329555 Method for producing a capping wafer for a sensor Dec. 11, 2012
8324730 Copper interconnection structure and method for forming copper interconnections Dec. 4, 2012
8324104 Surface treatment in semiconductor manufacturing Dec. 4, 2012
8319347 Electronic device package and fabrication method thereof Nov. 27, 2012
8319264 Semiconductor device and method for manufacturing the same Nov. 27, 2012
8318598 Contacts and vias of a semiconductor device formed by a hard mask and double exposure Nov. 27, 2012
8318580 Isolating wire bonding in integrated electrical components Nov. 27, 2012
8318538 Three dimensional structure memory Nov. 27, 2012
8314454 Local interconnect having increased misalignment tolerance Nov. 20, 2012
8309455 SiH.sub.4 soak for low hydrogen SiN deposition to improve flash memory device performance Nov. 13, 2012
8304911 Semiconductor structure and manufacturing method of the same Nov. 6, 2012
8304348 Semiconductor device manufacturing method and semiconductor device Nov. 6, 2012
8299618 Metal programmable logic and multiple function pin interface Oct. 30, 2012
8299583 Two-sided semiconductor structure Oct. 30, 2012
8298902 Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit Oct. 30, 2012
8293647 Bottom up plating by organic surface passivation and differential plating retardation Oct. 23, 2012
8288648 Solar cell Oct. 16, 2012
8288275 Method forming contact plug for semiconductor device using H2 remote plasma treatment Oct. 16, 2012
8288206 Three dimensional structure memory Oct. 16, 2012
8283784 Method for producing a power semiconductor module, and power semiconductor module comprising a connection device Oct. 9, 2012
8283249 Local interconnect having increased misalignment tolerance Oct. 9, 2012
8283237 Fabrication of through-silicon vias on silicon wafers Oct. 9, 2012
8283205 Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die Oct. 9, 2012
8274160 Active area bonding compatible high current structures Sep. 25, 2012
8273652 Semiconductor memory device and method of manufacturing the same Sep. 25, 2012
8273651 Method for fabricating wiring structure of wiring board Sep. 25, 2012
8273632 Patterning methodology for uniformity control Sep. 25, 2012
8273582 Method for use in making electronic devices having thin-film magnetic components Sep. 25, 2012
RE43674 Post passivation metal scheme for high-performance integrated circuit devices Sep. 18, 2012
8264085 Semiconductor device package interconnections Sep. 11, 2012
8263487 Method of forming patterns of semiconductor device Sep. 11, 2012
8252680 Methods and architectures for bottomless interconnect vias Aug. 28, 2012
8247904 Interconnection between sublithographic-pitched structures and lithographic-pitched structures Aug. 21, 2012











 
 
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