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Class Information
Number: 438/618
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects)
Description: Processes wherein the electrical contact is formed so as to make electrical contact to plural semiconductive regions










Sub-classes under this class:

Class Number Class Name Patents
438/619 Air bridge structure 512
438/621 Contacting diversely doped semiconductive regions (e.g., p-type and n-type regions, etc.) 190
438/642 Diverse conductors 261
438/620 Forming contacts of differing depths into semiconductor substrate 405
438/622 Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) 2,472


Patents under this class:
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Patent Number Title Of Patent Date Issued
7229907 Method of forming a damascene structure with integrated planar dielectric layers Jun. 12, 2007
7227254 Integrated circuit package Jun. 5, 2007
7226857 Front-end processing of nickel plated bond pads Jun. 5, 2007
7226855 Semiconductor integrated circuit device having diagonal direction wiring and layout method therefor Jun. 5, 2007
7223692 Multi-level semiconductor device with capping layer for improved adhesion May. 29, 2007
7223684 Dual damascene wiring and method May. 29, 2007
7222419 Method of fabricating a ceramic substrate with a thermal conductive plug of a multi-chip package May. 29, 2007
7220664 Fabrication method for semiconductor structure in a substrate, the semiconductor structure having at least two regions that are to be patterned differently May. 22, 2007
7217648 Post-ESL porogen burn-out for copper ELK integration May. 15, 2007
7217647 Structure and method of making a semiconductor integrated circuit tolerant of mis-alignment of a metal contact pattern May. 15, 2007
7215028 Semiconductor device and method for fabricating the same May. 8, 2007
7214325 Method of fabricating ohmic contact on n-type gallium nitride (GaN) of room temperature by plasma surface treatment May. 8, 2007
7211506 Methods of forming cobalt layers for semiconductor devices May. 1, 2007
7211505 Production method for wiring structure of semiconductor device May. 1, 2007
7208404 Method to reduce Rs pattern dependence effect Apr. 24, 2007
7208372 Non-volatile memory resistor cell with nanotip electrode Apr. 24, 2007
7208363 Fabrication of local interconnect lines Apr. 24, 2007
7208341 Method for manufacturing printed circuit board Apr. 24, 2007
7205233 Method for forming CoWRe alloys by electroless deposition Apr. 17, 2007
7205227 Methods of forming CMOS constructions Apr. 17, 2007
7205209 Fabrication of stacked dielectric layer for suppressing electrostatic charge buildup Apr. 17, 2007
7202179 Method of forming at least one thin film device Apr. 10, 2007
7199038 Method for fabricating semiconductor device Apr. 3, 2007
7199035 Interconnect junction providing reduced current crowding and method of manufacturing same Apr. 3, 2007
7196002 Method of making dual damascene with via etch through Mar. 27, 2007
7189988 Molecular electronics arrangement and method for producing a molecular electronics arrangement Mar. 13, 2007
7189637 Method of manufacturing a semiconductor device having a multi-layered wiring structure Mar. 13, 2007
7189635 Reduction of a feature dimension in a nano-scale device Mar. 13, 2007
7186639 Metal interconnection lines of semiconductor devices and methods of forming the same Mar. 6, 2007
7183196 Multilayer interconnection board and production method thereof Feb. 27, 2007
7183195 Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler Feb. 27, 2007
7183194 Method of forming socket contacts Feb. 27, 2007
7183193 Integrated device technology using a buried power buss for major device and circuit advantages Feb. 27, 2007
7179737 Semiconductor device and a method of manufacturing the same Feb. 20, 2007
7179732 Interconnection structure and fabrication method thereof Feb. 20, 2007
7176120 Method of manufacturing semiconductor device Feb. 13, 2007
7176119 Method of fabricating copper damascene and dual damascene interconnect wiring Feb. 13, 2007
7176118 Circuit constructions Feb. 13, 2007
7172969 Method and system for etching a film stack Feb. 6, 2007
7172908 Magnetic memory cells and manufacturing methods Feb. 6, 2007
7169711 Method of using carbon spacers for critical dimension (CD) reduction Jan. 30, 2007
7169708 Semiconductor device fabrication method Jan. 30, 2007
7169697 Semiconductor device and manufacturing method of the same Jan. 30, 2007
7169696 Method for making a system for selecting one wire from a plurality of wires Jan. 30, 2007
7169695 Method for forming a dual damascene structure Jan. 30, 2007
7163886 Semiconductor integrated circuit device and process for manufacturing the same Jan. 16, 2007
7163883 Edge seal for a semiconductor device Jan. 16, 2007
7163870 Semiconductor integrated circuit device Jan. 16, 2007
7161195 Semiconductor device and fabrication process thereof Jan. 9, 2007
7160798 Method of making reinforced semiconductor package Jan. 9, 2007

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