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Class Information
Number: 438/618
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Contacting multiple semiconductive regions (i.e., interconnects)
Description: Processes wherein the electrical contact is formed so as to make electrical contact to plural semiconductive regions










Sub-classes under this class:

Class Number Class Name Patents
438/619 Air bridge structure 512
438/621 Contacting diversely doped semiconductive regions (e.g., p-type and n-type regions, etc.) 190
438/642 Diverse conductors 261
438/620 Forming contacts of differing depths into semiconductor substrate 405
438/622 Multiple metal levels, separated by insulating layer (i.e., multiple level metallization) 2,472


Patents under this class:
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Patent Number Title Of Patent Date Issued
7300868 Damascene interconnection having porous low k layer with a hard mask reduced in thickness Nov. 27, 2007
7297636 Methods for fabricating device features having small dimensions Nov. 20, 2007
7295745 Method for fabricating periodic structure Nov. 13, 2007
7294567 Semiconductor contact device and method Nov. 13, 2007
7291558 Copper interconnect wiring and method of forming thereof Nov. 6, 2007
7291550 Method to form a contact hole Nov. 6, 2007
7288475 Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner Oct. 30, 2007
7285488 Method of fabricating strained channel field effect transistor pair having underlapped dual liners Oct. 23, 2007
7285487 Method and apparatus for network with multilayer metalization Oct. 23, 2007
7282435 Method of forming contact for dual liner product Oct. 16, 2007
7282434 Method of manufacturing a semiconductor device Oct. 16, 2007
7279411 Process for forming a redundant structure Oct. 9, 2007
7279410 Method for forming inlaid structures for IC interconnections Oct. 9, 2007
7279391 Integrated inductors and compliant interconnects for semiconductor packaging Oct. 9, 2007
7276439 Method for forming contact hole for dual damascene interconnection in semiconductor device Oct. 2, 2007
7276438 Method of manufacturing wiring substrate Oct. 2, 2007
7273807 Method for fabricating semiconductor device by forming damascene interconnections Sep. 25, 2007
7271485 Systems and methods for distributing I/O in a semiconductor device Sep. 18, 2007
7271086 Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces Sep. 18, 2007
7268071 Dual damascene interconnections having low K layer with reduced damage arising from photoresist stripping Sep. 11, 2007
7265047 Post passivation interconnection schemes on top of the IC chips Sep. 4, 2007
7264991 Method of connecting a conductive trace to a semiconductor chip using conductive adhesive Sep. 4, 2007
7262133 Enhancement of copper line reliability using thin ALD tan film to cap the copper line Aug. 28, 2007
7262126 Sealing and protecting integrated circuit bonding pads Aug. 28, 2007
7262125 Method of forming low-resistivity tungsten interconnects Aug. 28, 2007
7262075 High-aspect-ratio metal-polymer composite structures for nano interconnects Aug. 28, 2007
7259088 Apparatus for singulating and bonding semiconductor chips, and method for the same Aug. 21, 2007
7259087 Semiconductor devices having a via hole and methods for forming a via hole in a semiconductor device Aug. 21, 2007
7256120 Method to eliminate plating copper defect Aug. 14, 2007
7256118 Semiconductor device using low-K material as interlayer insulating film and its manufacture method Aug. 14, 2007
7253094 Methods for cleaning contact openings to reduce contact resistance Aug. 7, 2007
7253093 Method for fabricating interconnection in an insulating layer on a wafer Aug. 7, 2007
7253092 Tungsten plug corrosion prevention method using water Aug. 7, 2007
7253091 Process for assembling three-dimensional systems on a chip and structure thus obtained Aug. 7, 2007
7250335 Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin Jul. 31, 2007
7247562 Semiconductor element, semiconductor device and methods for manufacturing thereof Jul. 24, 2007
7247554 Method of making integrated circuits using ruthenium and its oxides as a Cu diffusion barrier Jul. 24, 2007
7247552 Integrated circuit having structural support for a flip-chip interconnect pad and method therefor Jul. 24, 2007
7245019 Semiconductor device with improved wiring arrangement utilizing a projecting portion and a method of manufacturing the same Jul. 17, 2007
7244672 Selective etching of organosilicate films over silicon oxide stop etch layers Jul. 17, 2007
7241681 Bilayered metal hardmasks for use in dual damascene etch schemes Jul. 10, 2007
7238607 Method to minimize formation of recess at surface planarized by chemical mechanical planarization Jul. 3, 2007
7238604 Forming thin hard mask over air gap or porous dielectric Jul. 3, 2007
7235475 Semiconductor nanowire fluid sensor and method for fabricating the same Jun. 26, 2007
7232749 Integrated circuit inductane and the fabrication method thereof Jun. 19, 2007
7232748 BARC/resist via etchback process Jun. 19, 2007
7232746 Method for forming dual damascene interconnection in semiconductor device Jun. 19, 2007
7230340 Post passivation interconnection schemes on top of the IC chips Jun. 12, 2007
7229909 Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes Jun. 12, 2007
7229908 System and method for manufacturing an out of plane integrated circuit inductor Jun. 12, 2007

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