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Class Information
Number: 438/599
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Selectively interconnecting (e.g., customization, wafer scale integration, etc.) > With electrical circuit layout
Description: Processes including a step of designing the topological arrangement of electrical conductors between arrayed device components.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7413981 |
Pitch doubled circuit layout |
Aug. 19, 2008 |
| 7396750 |
Method and structure for contacting two adjacent GMR memory bit |
Jul. 8, 2008 |
| 7393794 |
Pattern formation method |
Jul. 1, 2008 |
| 7387912 |
Packaging of electronic chips with air-bridge structures |
Jun. 17, 2008 |
| 7378339 |
Barrier for use in 3-D integration of circuits |
May. 27, 2008 |
| 7377032 |
Process for producing a printed wiring board for mounting electronic components |
May. 27, 2008 |
| 7338824 |
Method for manufacturing FFS mode LCD |
Mar. 4, 2008 |
| 7335517 |
Multichip semiconductor device, chip therefor and method of formation thereof |
Feb. 26, 2008 |
| 7335583 |
Isolating semiconductor device structures |
Feb. 26, 2008 |
| 7332378 |
Integrated circuit memory system with dummy active region |
Feb. 19, 2008 |
| 7306977 |
Method and apparatus for facilitating signal routing within a programmable logic device |
Dec. 11, 2007 |
| 7294534 |
Interconnect layout method |
Nov. 13, 2007 |
| 7271086 |
Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces |
Sep. 18, 2007 |
| 7214551 |
Multiple gate electrode linewidth measurement and photoexposure compensation method |
May. 8, 2007 |
| 7208410 |
Methods relating to forming interconnects |
Apr. 24, 2007 |
| 7202152 |
Semiconductor device with inductive component and method of making |
Apr. 10, 2007 |
| 7199035 |
Interconnect junction providing reduced current crowding and method of manufacturing same |
Apr. 3, 2007 |
| 7163883 |
Edge seal for a semiconductor device |
Jan. 16, 2007 |
| 7148135 |
Method of designing low-power semiconductor integrated circuit |
Dec. 12, 2006 |
| 7129157 |
Method for fabricating an integrated circuit |
Oct. 31, 2006 |
| 7067412 |
Semiconductor device and method of manufacturing the same |
Jun. 27, 2006 |
| 7054052 |
Adhesive sacrificial bonding of spatial light modulators |
May. 30, 2006 |
| 7045392 |
Semiconductor device and method of fabrication thereof, semiconductor module, circuit board, and electronic equipment |
May. 16, 2006 |
| 7042066 |
Dual-trench isolated crosspoint memory array |
May. 9, 2006 |
| 7012015 |
Wafer-level thick film standing-wave clocking |
Mar. 14, 2006 |
| 7001834 |
Integrated circuit and method of manufacturing an integrated circuit and package |
Feb. 21, 2006 |
| 6989297 |
Variable thickness pads on a substrate surface |
Jan. 24, 2006 |
| 6943056 |
Semiconductor device manufacturing method and electronic equipment using same |
Sep. 13, 2005 |
| 6939788 |
Semiconductor device with inductive component and method of making |
Sep. 6, 2005 |
| 6933611 |
Selective solder bump application |
Aug. 23, 2005 |
| 6921713 |
Semiconductor chip package with interconnect structure |
Jul. 26, 2005 |
| 6917459 |
MEMS device and method of forming MEMS device |
Jul. 12, 2005 |
| 6913988 |
Methods for fabricating semiconductor device test apparatus that include protective structures for intermediate conductive elements |
Jul. 5, 2005 |
| 6913989 |
Method of exposing a semiconductor integrated circuit including device regions and global routing region |
Jul. 5, 2005 |
| 6905967 |
Method for improving planarity of shallow trench isolation using multiple simultaneous tiling systems |
Jun. 14, 2005 |
| 6897135 |
Method for fabricating metal interconnections |
May. 24, 2005 |
| 6884711 |
Partially populated ball grid design to accommodate landing pads close to the die |
Apr. 26, 2005 |
| 6885044 |
Arrays of nonvolatile memory cells wherein each cell has two conductive floating gates |
Apr. 26, 2005 |
| 6875651 |
Dual-trench isolated crosspoint memory array and method for fabricating same |
Apr. 5, 2005 |
| 6864123 |
Memory device and manufacturing method therefor |
Mar. 8, 2005 |
| 6855608 |
Method of fabricating a planar structure charge trapping memory cell array with rectangular gates and reduced bit line resistance |
Feb. 15, 2005 |
| 6803241 |
Method of monitoring contact hole of integrated circuit using corona charges |
Oct. 12, 2004 |
| 6803300 |
Method of manufacturing a semiconductor device having a ground plane |
Oct. 12, 2004 |
| 6784061 |
Process to improve the Vss line formation for high density flash memory and related structure associated therewith |
Aug. 31, 2004 |
| 6780745 |
Semiconductor integrated circuit and method of manufacturing the same |
Aug. 24, 2004 |
| 6777314 |
Method of forming electrolytic contact pads including layers of copper, nickel, and gold |
Aug. 17, 2004 |
| 6770493 |
Integrated circuit package capable of operating in multiple orientations |
Aug. 3, 2004 |
| 6764936 |
Mechanical landing pad formed on the underside of a MEMS device |
Jul. 20, 2004 |
| 6759316 |
Method of manufacturing a semiconductor chip |
Jul. 6, 2004 |
| 6759280 |
Memory device with divided bit-line architecture |
Jul. 6, 2004 |
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