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Class Information
Number: 438/598
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > To form ohmic contact to semiconductive material > Selectively interconnecting (e.g., customization, wafer scale integration, etc.)
Description: Processes wherein an array of devices is electrically interconnected into a designated circuit arrangement.

Sub-classes under this class:

Class Number Class Name Patents
438/600 Using structure alterable to conductive state (i.e., antifuse) 326
438/601 Using structure alterable to nonconductive state (i.e., fuse) 403
438/599 With electrical circuit layout 276

Patents under this class:
1 2 3 4 5 6 7 8 9

Patent Number Title Of Patent Date Issued
8704353 Thermal management of stacked semiconductor chips with electrically non-functional interconnects Apr. 22, 2014
8691682 Semiconductor device and method for forming the same Apr. 8, 2014
8689163 Semiconductor apparatus capable of error revision using pin extension technique and design method therefor Apr. 1, 2014
8673725 Multilayer sidewall spacer for seam protection of a patterned structure Mar. 18, 2014
8673760 Methods of forming structures on an integrated circuit product Mar. 18, 2014
8664759 Integrated circuit with heat conducting structures for localized thermal control Mar. 4, 2014
8664125 Highly selective spacer etch process with reduced sidewall spacer slimming Mar. 4, 2014
8664106 Method of manufacturing semiconductor device Mar. 4, 2014
8658526 Methods for increased array feature density Feb. 25, 2014
8642460 Semiconductor switching device and method of making the same Feb. 4, 2014
8633099 Method for forming interlayer connectors in a three-dimensional stacked IC device Jan. 21, 2014
8633104 Methods of manufacturing three-dimensional semiconductor devices Jan. 21, 2014
8629066 Liner formation in 3DIC structures Jan. 14, 2014
8629542 Three dimensional structure memory Jan. 14, 2014
8592993 Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads Nov. 26, 2013
8592303 Wiring structure and method for manufacturing the same Nov. 26, 2013
8586465 Through silicon via dies and packages Nov. 19, 2013
8587124 Semiconductor device having low dielectric insulating film and manufacturing method of the same Nov. 19, 2013
8580669 Method for fabricating semiconductor device Nov. 12, 2013
8574964 Semiconductor device and method of forming electrical interconnection between semiconductor die and substrate with continuous body of solder tape Nov. 5, 2013
8569160 Device fabrication Oct. 29, 2013
8557644 Method for fabricating a monolithic integrated composite group III-V and group IV semiconductor device Oct. 15, 2013
8541887 Layered chip package and method of manufacturing same Sep. 24, 2013
8502377 Package substrate for bump on trace interconnection Aug. 6, 2013
8492260 Processes of forming an electronic device including a feature in a trench Jul. 23, 2013
8492198 Microelectronic workpieces with stand-off projections and methods for manufacturing microelectronic devices using such workpieces Jul. 23, 2013
8470705 Chip pad resistant to antenna effect and method Jun. 25, 2013
8466054 Thermal conduction paths for semiconductor structures Jun. 18, 2013
8450154 Oxide based memory with a controlled oxygen vacancy conduction path May. 28, 2013
8431474 Three dimensional multilayer circuit Apr. 30, 2013
8426257 Method for fabricating semiconductor device Apr. 23, 2013
8404578 Methods of forming nonvolatile memory devices having electromagnetically shielding source plates Mar. 26, 2013
8399336 Method for fabricating a 3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer Mar. 19, 2013
8395240 Bond pad for low K dielectric materials and method for manufacture for semiconductor devices Mar. 12, 2013
8389396 Method for manufacture of integrated circuit package system with protected conductive layers for pads Mar. 5, 2013
8372740 Methods for increased array feature density Feb. 12, 2013
8367522 Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads Feb. 5, 2013
8357606 Resist feature and removable spacer pitch doubling patterning method for pillar structures Jan. 22, 2013
8334597 Semiconductor device having via connecting between interconnects Dec. 18, 2012
8329574 Methods of fabricating flash memory devices having shared sub active regions Dec. 11, 2012
8314024 Device fabrication Nov. 20, 2012
8309405 Three dimensional semiconductor memory device and method of fabricating the same Nov. 13, 2012
8309434 Method for manufacturing semiconductor device including semiconductor elements with electrode formed thereon Nov. 13, 2012
8298928 Manufacturing method of a semiconductor device and method for creating a layout thereof Oct. 30, 2012
8283778 Thermally balanced via Oct. 9, 2012
8247290 Semiconductor device and method of manufacturing thereof Aug. 21, 2012
8242578 Anti-fuse device structure and electroplating circuit structure and method Aug. 14, 2012
8243177 Wafer-scale cluster image sensor chip and method with replicated gapless pixel line and signal readout circuit segments Aug. 14, 2012
8237296 Selective UV-Ozone dry etching of anti-stiction coatings for MEMS device fabrication Aug. 7, 2012
8232203 Methods of manufacturing memory devices Jul. 31, 2012

1 2 3 4 5 6 7 8 9

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