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Class Information
Number: 438/592
Name: Semiconductor device manufacturing: process > Coating with electrically or thermally conductive material > Insulated gate formation > Possessing plural conductive layers (e.g., polycide)
Description: Processes wherein the electrode is a laminate of multiple conductive layers.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7619255 |
Layer-stacked wiring and method for manufacturing same and semiconductor device using same and method for manufacturing semiconductor device |
Nov. 17, 2009 |
| 7611933 |
Process for manufacturing a thin-film transistor (TFT) device and TFT device manufactured by the process |
Nov. 3, 2009 |
| 7605069 |
Method for fabricating semiconductor device with gate |
Oct. 20, 2009 |
| 7605068 |
Semiconductor device having a silicide layer and manufacturing method thereof |
Oct. 20, 2009 |
| 7601623 |
Method of manufacturing a semiconductor device with a gate electrode having a laminate structure |
Oct. 13, 2009 |
| 7601577 |
Work function control of metals |
Oct. 13, 2009 |
| 7595245 |
Semiconductor device having a gate electrode material feature located adjacent a gate width side of its gate electrode and a method of manufacture therefor |
Sep. 29, 2009 |
| 7592674 |
Semiconductor device with silicide-containing gate electrode and method of fabricating the same |
Sep. 22, 2009 |
| 7585756 |
Semiconductor device and method of manufacturing the same |
Sep. 8, 2009 |
| 7579231 |
Semiconductor device and method of manufacturing the same |
Aug. 25, 2009 |
| 7572722 |
Method of fabricating nickel silicide |
Aug. 11, 2009 |
| 7572719 |
Semiconductor device and manufacturing method thereof |
Aug. 11, 2009 |
| 7572692 |
Complementary transistors having different source and drain extension spacing controlled by different spacer sizes |
Aug. 11, 2009 |
| 7569483 |
Methods of forming metal silicide layers by annealing metal layers using inert heat transferring gases established in a convection apparatus |
Aug. 4, 2009 |
| 7569467 |
Semiconductor device and manufacturing method thereof |
Aug. 4, 2009 |
| 7569466 |
Dual metal gate self-aligned integration |
Aug. 4, 2009 |
| 7566644 |
Method for forming gate electrode of semiconductor device |
Jul. 28, 2009 |
| 7563700 |
Method for improving self-aligned silicide extendibility with spacer recess using an aggregated spacer recess etch (ASRE) integration |
Jul. 21, 2009 |
| 7560349 |
Semiconductor device and gate structure having a composite dielectric layer and methods of manufacturing the same |
Jul. 14, 2009 |
| 7557025 |
Method of etching a dielectric layer to form a contact hole and a via hole and damascene method |
Jul. 7, 2009 |
| 7550373 |
Method of forming a salicide layer for a semiconductor device |
Jun. 23, 2009 |
| 7544597 |
Method of forming a semiconductor device including an ohmic layer |
Jun. 9, 2009 |
| 7544595 |
Forming a semiconductor device having a metal electrode and structure thereof |
Jun. 9, 2009 |
| 7544575 |
Dual metal silicide scheme using a dual spacer process |
Jun. 9, 2009 |
| 7544553 |
Integration scheme for fully silicided gate |
Jun. 9, 2009 |
| 7541650 |
Gate electrode structures |
Jun. 2, 2009 |
| 7541269 |
Method of forming tungsten polymetal gate having low resistance |
Jun. 2, 2009 |
| 7541255 |
Method for manufacturing semiconductor device |
Jun. 2, 2009 |
| 7538001 |
Transistor gate forming methods and integrated circuits |
May. 26, 2009 |
| 7537998 |
Method for forming salicide in semiconductor device |
May. 26, 2009 |
| 7537981 |
Silicon on insulator device and method of manufacturing the same |
May. 26, 2009 |
| 7537943 |
Method of manufacturing a semiconductor integrated circuit device |
May. 26, 2009 |
| 7534711 |
System and method for direct etching |
May. 19, 2009 |
| 7534709 |
Semiconductor device and method of manufacturing the same |
May. 19, 2009 |
| 7534706 |
Recessed poly extension T-gate |
May. 19, 2009 |
| 7528029 |
Stressor integration and method thereof |
May. 5, 2009 |
| 7521346 |
Method of forming HfSiN metal for n-FET applications |
Apr. 21, 2009 |
| 7517781 |
Method of manufacturing semiconductor device |
Apr. 14, 2009 |
| 7517780 |
Method for eliminating polycide voids through nitrogen implantation |
Apr. 14, 2009 |
| 7510956 |
MOS device with multi-layer gate stack |
Mar. 31, 2009 |
| 7507611 |
Thin film transistor and method for manufacturing the same |
Mar. 24, 2009 |
| 7504329 |
Method of forming a Yb-doped Ni full silicidation low work function gate electrode for n-MOSFET |
Mar. 17, 2009 |
| 7501334 |
Semiconductor devices having a pocket line and methods of fabricating the same |
Mar. 10, 2009 |
| 7501333 |
Work function adjustment on fully silicided (FUSI) gate |
Mar. 10, 2009 |
| 7498264 |
Method to obtain fully silicided poly gate |
Mar. 3, 2009 |
| 7494877 |
Methods of forming semiconductor devices including Fin structures |
Feb. 24, 2009 |
| 7494864 |
Method for production of semiconductor device |
Feb. 24, 2009 |
| 7494859 |
Semiconductor device having metal gate patterns and related method of manufacture |
Feb. 24, 2009 |
| 7491635 |
Method for forming a fully silicided gate and devices obtained thereof |
Feb. 17, 2009 |
| 7491634 |
Methods for forming roughened surfaces and applications thereof |
Feb. 17, 2009 |
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