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Class Information
Number: 438/564
Name: Semiconductor device manufacturing: process > Introduction of conductivity modifying dopant into semiconductive material > Diffusing a dopant > From solid dopant source in contact with semiconductor region > Polycrystalline semiconductor source
Description: Processes wherein the solid dopant source material is composed of a multicrystalline semiconductor (i.e., polysilicon).










Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
6248650 Self-aligned BJT emitter contact Jun. 19, 2001
6235582 Method for forming flash memory cell May. 22, 2001
6207539 Semiconductor device having field isolating film of which upper surface is flat and method thereof Mar. 27, 2001
6204110 Methods of forming an SRAM Mar. 20, 2001
6190977 Method for forming MOSFET with an elevated source/drain Feb. 20, 2001
6180442 Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method Jan. 30, 2001
6162690 Methods of forming field effect transistors having self-aligned intermediate source and drain contacts Dec. 19, 2000
6156594 Fabrication of bipolar/CMOS integrated circuits and of a capacitor Dec. 5, 2000
6153471 Method of fabricating flash memory Nov. 28, 2000
6153904 Fabrication method for increasing the coupling efficiency of ETOX flash memory devices Nov. 28, 2000
6150244 Method for fabricating MOS transistor having raised source and drain Nov. 21, 2000
6136636 Method of manufacturing deep sub-micron CMOS transistors Oct. 24, 2000
6133126 Method for fabricating a dopant region Oct. 17, 2000
6124180 BiCMOS process for counter doped collector Sep. 26, 2000
6117719 Oxide spacers as solid sources for gallium dopant introduction Sep. 12, 2000
6104069 Semiconductor device having an elevated active region formed in an oxide trench Aug. 15, 2000
6093626 Buried contact method to release plasma-included charging damage on device Jul. 25, 2000
6093610 Self-aligned pocket process for deep sub-0.1 .mu.m CMOS devices and the device Jul. 25, 2000
6090691 Method for forming a raised source and drain without using selective epitaxial growth Jul. 18, 2000
6087248 Method of forming a transistor having thin doped semiconductor gate Jul. 11, 2000
6083798 Method of producing a metal oxide semiconductor device with raised source/drain Jul. 4, 2000
6057195 Method of fabricating high density flat cell mask ROM May. 2, 2000
6057198 Semiconductor processing method of forming a buried contact May. 2, 2000
6051466 Method of making a semiconductor device with a stacked cell structure Apr. 18, 2000
6040221 Semiconductor processing methods of forming a buried contact, a conductive line, an electrical connection to a buried contact area, and a field effect transistor gate Mar. 21, 2000
6027991 Method of making a silicide semiconductor device with junction breakdown prevention Feb. 22, 2000
6015740 Method of fabricating CMOS devices with ultra-shallow junctions and reduced drain area Jan. 18, 2000
6013310 Method for producing a thin film semiconductor device Jan. 11, 2000
6001697 Process for manufacturing semiconductor devices having raised doped regions Dec. 14, 1999
6001712 Insulated gate field effect semiconductor device and forming method thereof Dec. 14, 1999
5981321 Forming CMOS transistor using diffusion source and wet/dry oxidation Nov. 9, 1999
5960273 Method of manufacturing a semiconductor device including a bipolar transistor Sep. 28, 1999
5953605 Fabrication process of semiconductor device Sep. 14, 1999
5946578 Method of fabricating semiconductor device having source/drain layer raised from substrate surface Aug. 31, 1999
5933721 Method for fabricating differential threshold voltage transistor pair Aug. 3, 1999
5930617 Method of forming deep sub-micron CMOS transistors with self-aligned silicided contact and extended S/D junction Jul. 27, 1999
5930616 Methods of forming a field effect transistor and method of forming CMOS circuitry Jul. 27, 1999
5926727 Phosphorous doping a semiconductor particle Jul. 20, 1999
5918129 Method of channel doping using diffusion from implanted polysilicon Jun. 29, 1999
5913111 Method of manufacturing an insulaed gate transistor Jun. 15, 1999
5913120 Process for fabricating integrated devices including nonvolatile memories and transistors with tunnel oxide protection Jun. 15, 1999
5909616 Method of forming CMOS circuitry Jun. 1, 1999
5904536 Self aligned poly emitter bipolar technology using damascene technique May. 18, 1999
5885887 Method of making an igfet with selectively doped multilevel polysilicon gate Mar. 23, 1999
5885761 Semiconductor device having an elevated active region formed from a thick polysilicon layer and method of manufacture thereof Mar. 23, 1999
5856228 Manufacturing method for making bipolar device having double polysilicon structure Jan. 5, 1999
5856214 Method of fabricating a low voltage zener-triggered SCR for ESD protection in integrated circuits Jan. 5, 1999
5846867 Method of producing Si-Ge base heterojunction bipolar device Dec. 8, 1998
5846860 Method of making buried contact in DRAM technology Dec. 8, 1998
5843825 Fabrication method for semiconductor device having non-uniformly doped channel (NUDC) construction Dec. 1, 1998

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