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Class Information
Number: 438/564
Name: Semiconductor device manufacturing: process > Introduction of conductivity modifying dopant into semiconductive material > Diffusing a dopant > From solid dopant source in contact with semiconductor region > Polycrystalline semiconductor source
Description: Processes wherein the solid dopant source material is composed of a multicrystalline semiconductor (i.e., polysilicon).
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7563666 |
Semiconductor structures including vertical diode structures and methods of making the same |
Jul. 21, 2009 |
| 7553748 |
Semiconductor device and method of manufacturing the same |
Jun. 30, 2009 |
| 7462537 |
Fabricating method of an non-volatile memory |
Dec. 9, 2008 |
| 7449384 |
Method of manufacturing flash memory device |
Nov. 11, 2008 |
| 7419872 |
Method for preparing a trench capacitor structure |
Sep. 2, 2008 |
| 7045397 |
JFET and MESFET structures for low voltage high current and high frequency applications |
May. 16, 2006 |
| 6867113 |
In-situ deposition and doping process for polycrystalline silicon layers and the resulting device |
Mar. 15, 2005 |
| 6852603 |
Fabrication of abrupt ultra-shallow junctions |
Feb. 8, 2005 |
| 6821870 |
Heterojunction bipolar transistor and method for fabricating the same |
Nov. 23, 2004 |
| 6808999 |
Method of making a bipolar transistor having a reduced base transit time |
Oct. 26, 2004 |
| 6797600 |
Method of forming a local interconnect |
Sep. 28, 2004 |
| 6750091 |
Diode formation method |
Jun. 15, 2004 |
| 6677207 |
Vanishingly small integrated circuit diode |
Jan. 13, 2004 |
| 6660571 |
High voltage power MOSFET having low on-resistance |
Dec. 9, 2003 |
| 6645795 |
Polysilicon doped transistor using silicon-on-insulator and double silicon-on-insulator |
Nov. 11, 2003 |
| 6642134 |
Semiconductor processing employing a semiconductor spacer |
Nov. 4, 2003 |
| 6610587 |
Method of forming a local interconnect |
Aug. 26, 2003 |
| 6607957 |
Method for fabricating nitride read only memory |
Aug. 19, 2003 |
| 6569715 |
Large grain single crystal vertical thin film polysilicon mosfets |
May. 27, 2003 |
| 6566208 |
Method to form elevated source/drain using poly spacer |
May. 20, 2003 |
| 6566212 |
Method of fabricating an integrated circuit with ultra-shallow source/drain extensions |
May. 20, 2003 |
| 6506655 |
Bipolar transistor manufacturing method |
Jan. 14, 2003 |
| 6498071 |
Manufacture of trench-gate semiconductor devices |
Dec. 24, 2002 |
| 6492282 |
Integrated circuits and manufacturing methods |
Dec. 10, 2002 |
| 6479352 |
Method of fabricating high voltage power MOSFET having low on-resistance |
Nov. 12, 2002 |
| 6472287 |
Manufacturing method of semiconductor with a cleansing agent |
Oct. 29, 2002 |
| 6458693 |
Method of manufacturing a semiconductor device |
Oct. 1, 2002 |
| 6406973 |
Transistor in a semiconductor device and method of manufacturing the same |
Jun. 18, 2002 |
| 6391689 |
Method of forming a self-aligned thyristor |
May. 21, 2002 |
| 6391752 |
Method of fabricating a silicon-on-insulator semiconductor device with an implanted ground plane |
May. 21, 2002 |
| 6372589 |
Method of forming ultra-shallow source/drain extension by impurity diffusion from doped dielectric spacer |
Apr. 16, 2002 |
| 6372588 |
Method of making an IGFET using solid phase diffusion to dope the gate, source and drain |
Apr. 16, 2002 |
| 6365493 |
Method for antimony and boron doping of spherical semiconductors |
Apr. 2, 2002 |
| 6329273 |
Solid-source doping for source/drain to eliminate implant damage |
Dec. 11, 2001 |
| 6309935 |
Methods of forming field effect transistors |
Oct. 30, 2001 |
| 6300210 |
Method of manufacturing a semiconductor device comprising a bipolar transistor |
Oct. 9, 2001 |
| 6294415 |
Method of fabricating a MOS transistor |
Sep. 25, 2001 |
| 6274445 |
Method of manufacturing shallow source/drain junctions in a salicide process |
Aug. 14, 2001 |
| 6271068 |
Method for making improved polysilicon emitters for bipolar transistors on BiCMOS integrated circuits |
Aug. 7, 2001 |
| 6255183 |
Manufacture of a semiconductor device with a MOS transistor having an LDD structure using SiGe spacers |
Jul. 3, 2001 |
| 6255716 |
Bipolar junction transistors having base electrode extensions |
Jul. 3, 2001 |
| 6251730 |
Semiconductor power device manufacture |
Jun. 26, 2001 |
| 6248650 |
Self-aligned BJT emitter contact |
Jun. 19, 2001 |
| 6235582 |
Method for forming flash memory cell |
May. 22, 2001 |
| 6207539 |
Semiconductor device having field isolating film of which upper surface is flat and method thereof |
Mar. 27, 2001 |
| 6204110 |
Methods of forming an SRAM |
Mar. 20, 2001 |
| 6190977 |
Method for forming MOSFET with an elevated source/drain |
Feb. 20, 2001 |
| 6180442 |
Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method |
Jan. 30, 2001 |
| 6162690 |
Methods of forming field effect transistors having self-aligned intermediate source and drain contacts |
Dec. 19, 2000 |
| 6156594 |
Fabrication of bipolar/CMOS integrated circuits and of a capacitor |
Dec. 5, 2000 |
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