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Class Information
Number: 438/528
Name: Semiconductor device manufacturing: process > Introduction of conductivity modifying dopant into semiconductive material > Ion implantation of dopant into semiconductor region > Including multiple implantation steps > Providing nondopant ion (e.g., proton, etc.)
Description: Process wherein a nonelectrically active impurity species is implanted into a semiconductor region of the substrate in conjunction with the prior, simultaneous, or subsequent implantation of an electrically active dopant species.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6258695 Dislocation suppression by carbon incorporation Jul. 10, 2001
6258693 Ion implantation for scalability of isolation in an integrated circuit Jul. 10, 2001
6251757 Formation of highly activated shallow abrupt junction by thermal budget engineering Jun. 26, 2001
6248632 Method of forming gate electrode with polycide structure in semiconductor device Jun. 19, 2001
6242333 Method to enhance the formation of nucleation sites on silicon structures and an improved silicon structure Jun. 5, 2001
6235618 Method for forming nanometer-sized silicon quantum dots May. 22, 2001
6235599 Fabrication of a shallow doped junction having low sheet resistance using multiple implantations May. 22, 2001
6235607 Method for establishing component isolation regions in SOI semiconductor device May. 22, 2001
6235617 Semiconductor device and its manufacturing method May. 22, 2001
6232206 Method for forming electrostatic discharge (ESD) protection transistors May. 15, 2001
6232201 Semiconductor substrate processing method May. 15, 2001
RE37158 High performance sub-micron P-channel transistor with germanium implant May. 1, 2001
6221724 Method of fabricating an integrated circuit having punch-through suppression Apr. 24, 2001
6214657 Semiconductor device isolation structure and fabrication method of semiconductor device using the same Apr. 10, 2001
6204157 Method for establishing shallow junction in semiconductor device to minimize junction capacitance Mar. 20, 2001
6200887 Method to form a smooth gate polysilicon sidewall in the fabrication of integrated circuits Mar. 13, 2001
6200869 Method of fabricating an integrated circuit with ultra-shallow source/drain extensions Mar. 13, 2001
6194259 Forming retrograde channel profile and shallow LLDD/S-D extensions using nitrogen implants Feb. 27, 2001
6187655 Method for performing a pre-amorphization implant (PAI) which provides reduced resist protect oxide damage and reduced junction leakage Feb. 13, 2001
6184112 Method of forming a MOSFET transistor with a shallow abrupt retrograde dopant profile Feb. 6, 2001
6180476 Dual amorphization implant process for ultra-shallow drain and source extensions Jan. 30, 2001
6180487 Selective thinning of barrier oxide through masked SIMOX implant Jan. 30, 2001
6180473 Method for manufacturing semiconductor device Jan. 30, 2001
6174791 Method for a pre-amorphization Jan. 16, 2001
6171889 Semiconductor device and method of manufacturing the same Jan. 9, 2001
6171904 Method for forming rugged polysilicon capacitor Jan. 9, 2001
6168981 Method and apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices Jan. 2, 2001
6165877 Method for establishing shallow junction in semiconductor device to minimize junction capacitance Dec. 26, 2000
6165849 Method of manufacturing mosfet with differential gate oxide thickness on the same IC chip Dec. 26, 2000
6162710 Method for making MIS transistor Dec. 19, 2000
6153486 Method for establishing shallow junction in semiconductor device to minimize junction capacitance Nov. 28, 2000
6143631 Method for controlling the morphology of deposited silicon on a silicon dioxide substrate and semiconductor devices incorporating such deposited silicon Nov. 7, 2000
6136673 Process utilizing selective TED effect when forming devices with shallow junctions Oct. 24, 2000
6133084 Method of fabricating static random access memory Oct. 17, 2000
6127248 Fabrication method for semiconductor device Oct. 3, 2000
6114224 System and method for using N.sub.2 O plasma treatment to eliminate defects at an interface between a stop layer and an integral layered dielectric Sep. 5, 2000
6109207 Process for fabricating semiconductor device with shallow p-type regions using dopant compounds containing elements of high solid solubility Aug. 29, 2000
6103602 Method and system for providing a drain side pocket implant Aug. 15, 2000
6103597 Method of obtaining a thin film of semiconductor material Aug. 15, 2000
6100189 Second implant for agglomeration control Aug. 8, 2000
6100170 Method of manufacturing semiconductor device Aug. 8, 2000
6096614 Method to fabricate deep sub-.mu.m CMOSFETS Aug. 1, 2000
6083780 Semiconductor device and method of fabrication thereof Jul. 4, 2000
6074929 Box isolation technique for integrated circuit structures Jun. 13, 2000
6074937 End-of-range damage suppression for ultra-shallow junction formation Jun. 13, 2000
6071763 Method of fabricating layered integrated circuit Jun. 6, 2000
6069054 Method for forming isolation regions subsequent to gate formation and structure thereof May. 30, 2000
6069063 Method to form polysilicon resistors shielded from hydrogen intrusion May. 30, 2000
6069041 Process for manufacturing non-volatile semiconductor memory device by introducing nitrogen atoms May. 30, 2000
6069062 Methods for forming shallow junctions in semiconductor wafers May. 30, 2000

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